powerpc: B4420: Remove macro CONFIG_PPC_B4420

Replace CONFIG_PPC_B4420 with ARCH_B4420 in Kconfig and clean up
existing macros.

arch/powerpc/cpu/mpc85xx/Kconfig

@@ -18,6 +18,7 @@ config TARGET_SOCRATES
 
 config TARGET_B4420QDS
 	bool "Support B4420QDS"
+	select ARCH_B4420
 	select SUPPORT_SPL
 	select PHYS_64BIT
 
@@ -257,6 +258,9 @@ config TARGET_CYRUS
 
 endchoice
 
+config ARCH_B4420
+	bool
+
 config ARCH_B4860
 	bool
 

arch/powerpc/cpu/mpc85xx/Makefile

@@ -47,7 +47,7 @@ obj-$(CONFIG_ARCH_P5040) += p5040_ids.o
 obj-$(CONFIG_PPC_T4240) += t4240_ids.o
 obj-$(CONFIG_PPC_T4160) += t4240_ids.o
 obj-$(CONFIG_PPC_T4080) += t4240_ids.o
-obj-$(CONFIG_PPC_B4420) += b4860_ids.o
+obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
 obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
 obj-$(CONFIG_PPC_T1040) += t1040_ids.o
 obj-$(CONFIG_PPC_T1042)	+= t1040_ids.o
@@ -89,7 +89,7 @@ obj-$(CONFIG_ARCH_P5040) += p5040_serdes.o
 obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
 obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
 obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
-obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
+obj-$(CONFIG_ARCH_B4420) += b4860_serdes.o
 obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
 obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
 obj-$(CONFIG_PPC_T1040) += t1040_serdes.o

arch/powerpc/cpu/mpc85xx/b4860_ids.c

@@ -62,7 +62,7 @@ struct liodn_id_table liodn_tbl[] = {
 	SET_DMA_LIODN(1, "fsl,elo3-dma", 147),
 	SET_DMA_LIODN(2, "fsl,elo3-dma", 227),
 
-#ifndef CONFIG_PPC_B4420
+#ifndef CONFIG_ARCH_B4420
 	SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
 	SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
 	SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
@@ -81,7 +81,7 @@ struct fman_liodn_id_table fman1_liodn_tbl[] = {
 	SET_FMAN_RX_1G_LIODN(1, 3, 91),
 	SET_FMAN_RX_1G_LIODN(1, 4, 92),
 	SET_FMAN_RX_1G_LIODN(1, 5, 93),
-#ifndef CONFIG_PPC_B4420
+#ifndef CONFIG_ARCH_B4420
 	SET_FMAN_RX_10G_LIODN(1, 0, 94),
 	SET_FMAN_RX_10G_LIODN(1, 1, 95),
 #endif

arch/powerpc/cpu/mpc85xx/b4860_serdes.c

@@ -180,7 +180,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
 };
 #endif
 
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 static struct serdes_config serdes1_cfg_tbl[] = {
 	{0x0D, {NONE, NONE, CPRI6, CPRI5,
 		CPRI4, CPRI3, NONE, NONE} },

arch/powerpc/cpu/mpc85xx/speed.c

@@ -202,7 +202,7 @@ void get_sys_info(sys_info_t *sys_info)
 	}
 #endif
 
-#if defined(CONFIG_ARCH_B4860) || defined(CONFIG_PPC_B4420) || \
+#if defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420) || \
 	defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
 #define FM1_CLK_SEL	0xe0000000
 #define FM1_CLK_SHIFT	29

arch/powerpc/include/asm/config_mpc85xx.h

@@ -611,7 +611,7 @@
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
-#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_PPC_B4420)
+#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 #define CONFIG_E6500
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */

arch/powerpc/include/asm/immap_85xx.h

@@ -1770,7 +1770,7 @@ typedef struct ccsr_gur {
 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL		0x000000f8
 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT	3
 #define FSL_CORENET_RCWSR6_BOOT_LOC	0x0f800000
-#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_PPC_B4420)
+#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL	0xfe000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT	25
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL	0x00ff0000
@@ -2883,8 +2883,8 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_TDM_OFFSET		0x185000
 #define CONFIG_SYS_MPC85xx_QE_OFFSET		0x140000
 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET	0x1e0000
-#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_ARCH_B4860)\
-	&& !defined(CONFIG_PPC_B4420)
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_ARCH_B4860) && \
+	!defined(CONFIG_ARCH_B4420)
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET		0x240000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET		0x250000
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET		0x260000

board/freescale/b4860qds/b4860qds.c

@@ -437,7 +437,7 @@ int configure_vsc3316_3308(void)
 		}
 		break;
 
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 	case 0x17:
 	case 0x18:
 			/*
@@ -496,7 +496,7 @@ int configure_vsc3316_3308(void)
 	/* Configure VSC3308 crossbar switch */
 	ret = select_i2c_ch_pca(I2C_CH_VSC3308);
 	switch (serdes2_prtcl) {
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 	case 0x9d:
 #endif
 	case 0x9E:
@@ -929,7 +929,7 @@ int config_serdes2_refclks(void)
 	 * For this SerDes2's Refclk1 need to be set to 100MHz
 	 */
 	switch (serdes2_prtcl) {
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 	case 0x9d:
 #endif
 	case 0x9E:

board/freescale/b4860qds/b4860qds_crossbar_con.h

@@ -28,7 +28,7 @@ static int8_t vsc16_tx_sfp_sgmii_aurora[8][2] = { {15, 7}, {0, 1},
 				{7, 8}, {9, 0}, {5, 14},
 				{4, 15}, {2, 12}, {12, 13} };
 
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 static int8_t vsc16_tx_sgmii_lane_cd[8][2] = { {5, 14}, {4, 15},
 		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 #endif
@@ -54,7 +54,7 @@ static int8_t vsc16_rx_sfp_sgmii_aurora[8][2] = { {8, 15}, {0, 1},
 				{7, 8}, {1, 9}, {14, 11},
 				{15, 10}, {13, 3}, {12, 12} };
 
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 static int8_t vsc16_rx_sgmii_lane_cd[8][2] = { {14, 11}, {15, 10},
 		{-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
 #endif

board/freescale/b4860qds/eth_b4860qds.c

@@ -213,7 +213,7 @@ int board_eth_init(bd_t *bis)
 		fm_info_set_phy_address(FM1_DTSEC6,
 				CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR);
 		break;
-#ifdef CONFIG_PPC_B4420
+#ifdef CONFIG_ARCH_B4420
 	case 0x17:
 	case 0x18:
 		/* Serdes 1: A-D SGMII, Configuring on board dual SGMII Phy */

configs/B4420QDS_NAND_defconfig

@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SPL=y

configs/B4420QDS_SPIFLASH_defconfig

@@ -5,7 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
 CONFIG_BOOTDELAY=10
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_HUSH_PARSER=y

configs/B4420QDS_defconfig

@@ -5,7 +5,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420"
 CONFIG_BOOTDELAY=10
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_HUSH_PARSER=y

drivers/net/fm/Makefile

@@ -35,7 +35,7 @@ obj-$(CONFIG_PPC_T2081) += t2080.o
 obj-$(CONFIG_PPC_T4240) += t4240.o
 obj-$(CONFIG_PPC_T4160) += t4240.o
 obj-$(CONFIG_PPC_T4080) += t4240.o
-obj-$(CONFIG_PPC_B4420) += b4860.o
+obj-$(CONFIG_ARCH_B4420) += b4860.o
 obj-$(CONFIG_ARCH_B4860) += b4860.o
 obj-$(CONFIG_LS1043A)	+= ls1043.o
 obj-$(CONFIG_ARCH_LS1046A)	+= ls1046.o

include/configs/B4860QDS.h

@@ -73,7 +73,7 @@
 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
-#ifndef CONFIG_PPC_B4420
+#ifndef CONFIG_ARCH_B4420
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */

scripts/config_whitelist.txt

@@ -3638,7 +3638,6 @@ CONFIG_PPC4xx_DDR_AUTOCALIBRATION
 CONFIG_PPC4xx_DDR_METHOD_A
 CONFIG_PPC4xx_EMAC
 CONFIG_PPC64BRIDGE
-CONFIG_PPC_B4420
 CONFIG_PPC_CLUSTER_START
 CONFIG_PPC_SPINTABLE_COMPATIBLE
 CONFIG_PPC_T1023