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@@ -67,15 +67,12 @@ struct sh_qspi_regs {
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};
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};
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struct sh_qspi_slave {
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struct sh_qspi_slave {
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+#ifndef CONFIG_DM_SPI
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struct spi_slave slave;
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struct spi_slave slave;
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+#endif
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struct sh_qspi_regs *regs;
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struct sh_qspi_regs *regs;
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};
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};
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-static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave)
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-{
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- return container_of(slave, struct sh_qspi_slave, slave);
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-}
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-
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static void sh_qspi_init(struct sh_qspi_slave *ss)
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static void sh_qspi_init(struct sh_qspi_slave *ss)
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{
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{
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/* QSPI initialize */
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/* QSPI initialize */
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@@ -119,15 +116,8 @@ static void sh_qspi_init(struct sh_qspi_slave *ss)
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setbits_8(&ss->regs->spcr, SPCR_SPE);
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setbits_8(&ss->regs->spcr, SPCR_SPE);
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}
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}
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-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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-{
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- return 1;
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-}
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-
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-void spi_cs_activate(struct spi_slave *slave)
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+static void sh_qspi_cs_activate(struct sh_qspi_slave *ss)
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{
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{
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- struct sh_qspi_slave *ss = to_sh_qspi(slave);
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-
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/* Set master mode only */
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/* Set master mode only */
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writeb(SPCR_MSTR, &ss->regs->spcr);
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writeb(SPCR_MSTR, &ss->regs->spcr);
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@@ -147,61 +137,15 @@ void spi_cs_activate(struct spi_slave *slave)
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setbits_8(&ss->regs->spcr, SPCR_SPE);
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setbits_8(&ss->regs->spcr, SPCR_SPE);
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}
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}
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-void spi_cs_deactivate(struct spi_slave *slave)
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+static void sh_qspi_cs_deactivate(struct sh_qspi_slave *ss)
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{
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{
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- struct sh_qspi_slave *ss = to_sh_qspi(slave);
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-
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/* Disable SPI Function */
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/* Disable SPI Function */
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clrbits_8(&ss->regs->spcr, SPCR_SPE);
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clrbits_8(&ss->regs->spcr, SPCR_SPE);
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}
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}
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-void spi_init(void)
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-{
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- /* nothing to do */
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-}
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-
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-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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- unsigned int max_hz, unsigned int mode)
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-{
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- struct sh_qspi_slave *ss;
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-
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- if (!spi_cs_is_valid(bus, cs))
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- return NULL;
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-
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- ss = spi_alloc_slave(struct sh_qspi_slave, bus, cs);
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- if (!ss) {
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- printf("SPI_error: Fail to allocate sh_qspi_slave\n");
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- return NULL;
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- }
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-
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- ss->regs = (struct sh_qspi_regs *)SH_QSPI_BASE;
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-
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- /* Init SH QSPI */
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- sh_qspi_init(ss);
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-
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- return &ss->slave;
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-}
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-
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-void spi_free_slave(struct spi_slave *slave)
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+static int sh_qspi_xfer_common(struct sh_qspi_slave *ss, unsigned int bitlen,
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+ const void *dout, void *din, unsigned long flags)
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{
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{
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- struct sh_qspi_slave *spi = to_sh_qspi(slave);
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-
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- free(spi);
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-}
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-
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-int spi_claim_bus(struct spi_slave *slave)
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-{
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- return 0;
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-}
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-
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-void spi_release_bus(struct spi_slave *slave)
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-{
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-}
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-
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-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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- void *din, unsigned long flags)
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-{
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- struct sh_qspi_slave *ss = to_sh_qspi(slave);
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u32 nbyte, chunk;
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u32 nbyte, chunk;
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int i, ret = 0;
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int i, ret = 0;
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u8 dtdata = 0, drdata;
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u8 dtdata = 0, drdata;
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@@ -210,7 +154,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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if (dout == NULL && din == NULL) {
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if (dout == NULL && din == NULL) {
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if (flags & SPI_XFER_END)
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if (flags & SPI_XFER_END)
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- spi_cs_deactivate(slave);
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+ sh_qspi_cs_deactivate(ss);
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return 0;
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return 0;
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}
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}
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@@ -222,7 +166,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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nbyte = bitlen / 8;
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nbyte = bitlen / 8;
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if (flags & SPI_XFER_BEGIN) {
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if (flags & SPI_XFER_BEGIN) {
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- spi_cs_activate(slave);
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+ sh_qspi_cs_activate(ss);
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/* Set 1048576 byte */
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/* Set 1048576 byte */
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writel(0x100000, spbmul0);
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writel(0x100000, spbmul0);
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@@ -273,7 +217,148 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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}
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}
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if (flags & SPI_XFER_END)
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if (flags & SPI_XFER_END)
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- spi_cs_deactivate(slave);
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+ sh_qspi_cs_deactivate(ss);
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return ret;
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return ret;
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}
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}
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+
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+#ifndef CONFIG_DM_SPI
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+static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave)
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+{
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+ return container_of(slave, struct sh_qspi_slave, slave);
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+}
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+
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+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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+{
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+ return 1;
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+}
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+
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+void spi_cs_activate(struct spi_slave *slave)
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+{
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+ struct sh_qspi_slave *ss = to_sh_qspi(slave);
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+
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+ sh_qspi_cs_activate(ss);
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+}
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+
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+void spi_cs_deactivate(struct spi_slave *slave)
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+{
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+ struct sh_qspi_slave *ss = to_sh_qspi(slave);
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+
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+ sh_qspi_cs_deactivate(ss);
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+}
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+
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+void spi_init(void)
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+{
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+ /* nothing to do */
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+}
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+
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+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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+ unsigned int max_hz, unsigned int mode)
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+{
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+ struct sh_qspi_slave *ss;
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+
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+ if (!spi_cs_is_valid(bus, cs))
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+ return NULL;
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+
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+ ss = spi_alloc_slave(struct sh_qspi_slave, bus, cs);
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+ if (!ss) {
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+ printf("SPI_error: Fail to allocate sh_qspi_slave\n");
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+ return NULL;
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+ }
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+
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+ ss->regs = (struct sh_qspi_regs *)SH_QSPI_BASE;
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+
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+ /* Init SH QSPI */
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+ sh_qspi_init(ss);
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+
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+ return &ss->slave;
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+}
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+
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+void spi_free_slave(struct spi_slave *slave)
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+{
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+ struct sh_qspi_slave *spi = to_sh_qspi(slave);
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+
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+ free(spi);
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+}
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+
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+int spi_claim_bus(struct spi_slave *slave)
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+{
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+ return 0;
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+}
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+
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+void spi_release_bus(struct spi_slave *slave)
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+{
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+}
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+
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+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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+ const void *dout, void *din, unsigned long flags)
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+{
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+ struct sh_qspi_slave *ss = to_sh_qspi(slave);
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+
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+ return sh_qspi_xfer_common(ss, bitlen, dout, din, flags);
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+}
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+
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+#else
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+
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+#include <dm.h>
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+
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+static int sh_qspi_xfer(struct udevice *dev, unsigned int bitlen,
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+ const void *dout, void *din, unsigned long flags)
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+{
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+ struct udevice *bus = dev->parent;
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+ struct sh_qspi_slave *ss = dev_get_platdata(bus);
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+
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+ return sh_qspi_xfer_common(ss, bitlen, dout, din, flags);
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+}
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+
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+static int sh_qspi_set_speed(struct udevice *dev, uint speed)
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+{
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+ /* This is a SPI NOR controller, do nothing. */
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+ return 0;
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+}
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+
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+static int sh_qspi_set_mode(struct udevice *dev, uint mode)
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+{
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+ /* This is a SPI NOR controller, do nothing. */
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+ return 0;
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+}
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+
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+static int sh_qspi_probe(struct udevice *dev)
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+{
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+ struct sh_qspi_slave *ss = dev_get_platdata(dev);
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+
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+ sh_qspi_init(ss);
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+
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+ return 0;
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+}
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+
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+static int sh_qspi_ofdata_to_platdata(struct udevice *dev)
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+{
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+ struct sh_qspi_slave *plat = dev_get_platdata(dev);
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+
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+ plat->regs = (struct sh_qspi_regs *)dev_read_addr(dev);
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+
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+ return 0;
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+}
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+
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+static const struct dm_spi_ops sh_qspi_ops = {
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+ .xfer = sh_qspi_xfer,
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+ .set_speed = sh_qspi_set_speed,
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+ .set_mode = sh_qspi_set_mode,
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+};
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+
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+static const struct udevice_id sh_qspi_ids[] = {
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+ { .compatible = "renesas,qspi" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(sh_qspi) = {
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+ .name = "sh_qspi",
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+ .id = UCLASS_SPI,
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+ .of_match = sh_qspi_ids,
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+ .ops = &sh_qspi_ops,
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+ .ofdata_to_platdata = sh_qspi_ofdata_to_platdata,
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+ .platdata_auto_alloc_size = sizeof(struct sh_qspi_slave),
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+ .probe = sh_qspi_probe,
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+};
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+#endif
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