With the boot0-hook inserting the additional padding to receive our SPL magic, the SPL_TEXT_BASE can be aligned again. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
@@ -25,7 +25,7 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10081fff
-#define CONFIG_SPL_TEXT_BASE 0x10081004
+#define CONFIG_SPL_TEXT_BASE 0x10081000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"