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@@ -264,6 +264,7 @@
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#define CSU_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x40000)
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#define IP2APB_PERFMON1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x44000)
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#define IP2APB_PERFMON2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000)
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+#define MX6UL_LCDIF1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000)
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#ifdef CONFIG_MX6SX
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#define DEBUG_MONITOR_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000)
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#else
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@@ -300,8 +301,6 @@
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#define CSI1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x14000)
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#define PXP_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x18000)
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#define CSI2_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x1C000)
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-#define LCDIF1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x20000)
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-#define LCDIF2_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x24000)
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#define VADC_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x28000)
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#define VDEC_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x2C000)
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#define SPBA_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x3C000)
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@@ -319,12 +318,11 @@
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#define PWM7_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xAC000)
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#define PWM8_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xB0000)
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#endif
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+/* Only for i.MX6SX */
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+#define LCDIF2_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x24000)
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+#define MX6SX_LCDIF1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x20000)
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#define MX6SX_WDOG3_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x88000)
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-/* only for i.MX6SX/UL */
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-#define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ? \
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- MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)
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-
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#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
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#define IRAM_SIZE 0x00040000
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#else
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@@ -332,9 +330,17 @@
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#endif
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#define FEC_QUIRK_ENET_MAC
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+#include <asm/imx-common/regs-lcdif.h>
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
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#include <asm/types.h>
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+/* only for i.MX6SX/UL */
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+#define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ? \
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+ MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)
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+#define LCDIF1_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL)) ? \
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+ MX6UL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR
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+
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+
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extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
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#define SRC_SCR_CORE_1_RESET_OFFSET 14
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