At present the low-level init is skipped on rockchip. Among other things this means that the instruction cache is left disabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
@@ -45,3 +45,7 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+void lowlevel_init(void)
+{
+}
@@ -270,3 +270,7 @@ err:
/* No way to report error here */
hang();
@@ -16,7 +16,6 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_OF_LIBFDT
#define CONFIG_DISPLAY_BOARDINFO