armv8: fsl-layerscape: Remove unnecessary flushing dcache

As the issue about the stack will get corrupted when switching between
the early and final mmu tables is fixed by commit 70e21b064, the
workaround to flush dcache is unnecessary and should be removed.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

arch/arm/cpu/armv8/fsl-layerscape/cpu.c

@@ -396,9 +396,6 @@ static inline void final_mmu_setup(void)
 	flush_dcache_range((ulong)level0_table,
 			   (ulong)level0_table + gd->arch.tlb_size);
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-	flush_dcache_all();
-#endif
 	/* point TTBR to the new table */
 	set_ttbr_tcr_mair(el, (u64)level0_table, LAYERSCAPE_TCR_FINAL,
 			  MEMORY_ATTRIBUTES);