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@@ -23,14 +23,25 @@ static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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int dram_init(void)
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{
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+ const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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- int len;
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+ int ac, sc, len;
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- val = get_memory_reg_prop(gd->fdt_blob, &len);
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- if (len < sizeof(*val))
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+ ac = fdt_address_cells(fdt, 0);
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+ sc = fdt_size_cells(fdt, 0);
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+ if (ac < 0 || sc < 1 || sc > 2) {
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+ printf("invalid address/size cells\n");
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return -EINVAL;
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+ }
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+
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+ val = get_memory_reg_prop(fdt, &len);
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+ if (len / sizeof(*val) < ac + sc)
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+ return -EINVAL;
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+
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+ val += ac;
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- gd->ram_size = fdt32_to_cpu(*(val + 1));
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+ gd->ram_size = sc == 2 ? fdt64_to_cpu(*(fdt64_t *)val) :
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+ fdt32_to_cpu(*val);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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@@ -39,19 +50,33 @@ int dram_init(void)
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void dram_init_banksize(void)
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{
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+ const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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- int len, i;
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+ int ac, sc, cells, len, i;
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- val = get_memory_reg_prop(gd->fdt_blob, &len);
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+ val = get_memory_reg_prop(fdt, &len);
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if (len < 0)
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return;
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+ ac = fdt_address_cells(fdt, 0);
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+ sc = fdt_size_cells(fdt, 0);
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+ if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
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+ printf("invalid address/size cells\n");
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+ return;
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+ }
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+
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+ cells = ac + sc;
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+
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len /= sizeof(*val);
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- len /= 2;
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- for (i = 0; i < len; i++) {
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- gd->bd->bi_dram[i].start = fdt32_to_cpu(*val++);
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- gd->bd->bi_dram[i].size = fdt32_to_cpu(*val++);
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+ for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
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+ i++, len -= cells) {
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+ gd->bd->bi_dram[i].start = ac == 2 ?
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+ fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
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+ val += ac;
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+ gd->bd->bi_dram[i].size = sc == 2 ?
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+ fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
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+ val += sc;
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, (unsigned long)gd->bd->bi_dram[i].start,
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