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@@ -0,0 +1,117 @@
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+/*
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+ * (C) Copyright 2015
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+ * Kamil Lulko, <rev13@wp.pl>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <asm/io.h>
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+#include <serial.h>
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+#include <asm/arch/stm32.h>
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+
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+#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
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+#define RCC_APB2ENR_USART1EN (1 << 4)
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+
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+#define USART_BASE STM32_USART1_BASE
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+#define RCC_USART_ENABLE RCC_APB2ENR_USART1EN
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+
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+struct stm32_serial {
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+ u32 sr;
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+ u32 dr;
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+ u32 brr;
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+ u32 cr1;
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+ u32 cr2;
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+ u32 cr3;
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+ u32 gtpr;
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+};
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+
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+#define USART_CR1_RE (1 << 2)
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+#define USART_CR1_TE (1 << 3)
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+#define USART_CR1_UE (1 << 13)
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+
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+#define USART_SR_FLAG_RXNE (1 << 5)
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+#define USART_SR_FLAG_TXE (1 << 7)
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+
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+#define USART_BRR_F_MASK 0xF
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+#define USART_BRR_M_SHIFT 4
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+#define USART_BRR_M_MASK 0xFFF0
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+static void stm32_serial_setbrg(void)
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+{
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+ serial_init();
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+}
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+
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+static int stm32_serial_init(void)
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+{
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+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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+ u32 clock, int_div, frac_div, tmp;
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+
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+ if ((USART_BASE & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE) {
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+ setbits_le32(&STM32_RCC->apb1enr, RCC_USART_ENABLE);
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+ clock = clock_get(CLOCK_APB1);
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+ } else if ((USART_BASE & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE) {
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+ setbits_le32(&STM32_RCC->apb2enr, RCC_USART_ENABLE);
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+ clock = clock_get(CLOCK_APB2);
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+ } else {
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+ return -1;
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+ }
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+
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+ int_div = (25 * clock) / (4 * gd->baudrate);
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+ tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
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+ frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
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+ tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
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+
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+ writel(tmp, &usart->brr);
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+ setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
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+
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+ return 0;
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+}
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+
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+static int stm32_serial_getc(void)
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+{
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+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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+ while ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
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+ ;
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+ return readl(&usart->dr);
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+}
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+
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+static void stm32_serial_putc(const char c)
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+{
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+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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+ while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
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+ ;
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+ writel(c, &usart->dr);
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+}
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+
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+static int stm32_serial_tstc(void)
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+{
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+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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+ u8 ret;
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+
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+ ret = readl(&usart->sr) & USART_SR_FLAG_RXNE;
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+ return ret;
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+}
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+
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+static struct serial_device stm32_serial_drv = {
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+ .name = "stm32_serial",
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+ .start = stm32_serial_init,
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+ .stop = NULL,
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+ .setbrg = stm32_serial_setbrg,
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+ .putc = stm32_serial_putc,
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+ .puts = default_serial_puts,
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+ .getc = stm32_serial_getc,
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+ .tstc = stm32_serial_tstc,
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+};
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+
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+void stm32_serial_initialize(void)
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+{
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+ serial_register(&stm32_serial_drv);
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+}
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+
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+__weak struct serial_device *default_serial_console(void)
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+{
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+ return &stm32_serial_drv;
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+}
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