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@@ -66,20 +66,6 @@ static struct sunxi_usbc_hcd {
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static int enabled_hcd_count;
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-void *sunxi_usbc_get_io_base(int index)
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-{
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- switch (index) {
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- case 0:
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- return (void *)SUNXI_USB0_BASE;
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- case 1:
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- return (void *)SUNXI_USB1_BASE;
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- case 2:
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- return (void *)SUNXI_USB2_BASE;
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- default:
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- return NULL;
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- }
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-}
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-
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static int get_vbus_gpio(int index)
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{
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switch (index) {
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@@ -102,7 +88,7 @@ static void usb_phy_write(struct sunxi_usbc_hcd *sunxi_usbc, int addr,
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int data, int len)
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{
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int j = 0, usbc_bit = 0;
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- void *dest = sunxi_usbc_get_io_base(0) + SUNXI_USB_CSR;
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+ void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR;
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#ifdef CONFIG_MACH_SUN8I_A33
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/* CSR needs to be explicitly initialized to 0 on A33 */
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@@ -153,11 +139,15 @@ static void sunxi_usb_phy_init(struct sunxi_usbc_hcd *sunxi_usbc)
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return;
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}
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-static void sunxi_usb_passby(struct sunxi_usbc_hcd *sunxi_usbc, int enable)
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+static void sunxi_usb_phy_passby(int index, int enable)
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{
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unsigned long bits = 0;
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- void *addr = sunxi_usbc_get_io_base(sunxi_usbc->id) +
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- SUNXI_USB_PMU_IRQ_ENABLE;
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+ void *addr;
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+
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+ if (index == 1)
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+ addr = (void *)SUNXI_USB1_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
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+ else
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+ addr = (void *)SUNXI_USB2_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
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bits = SUNXI_EHCI_AHB_ICHR8_EN |
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SUNXI_EHCI_AHB_INCR4_BURST_EN |
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@@ -227,7 +217,7 @@ void sunxi_usbc_enable(int index)
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sunxi_usb_phy_init(sunxi_usbc);
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if (sunxi_usbc->id != 0)
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- sunxi_usb_passby(sunxi_usbc, SUNXI_USB_PASSBY_EN);
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+ sunxi_usb_phy_passby(index, SUNXI_USB_PASSBY_EN);
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enabled_hcd_count++;
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}
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@@ -238,7 +228,7 @@ void sunxi_usbc_disable(int index)
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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if (sunxi_usbc->id != 0)
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- sunxi_usb_passby(sunxi_usbc, !SUNXI_USB_PASSBY_EN);
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+ sunxi_usb_phy_passby(index, !SUNXI_USB_PASSBY_EN);
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clrbits_le32(&ccm->usb_clk_cfg, sunxi_usbc->usb_rst_mask);
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