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@@ -21,7 +21,8 @@ DECLARE_GLOBAL_DATA_PTR;
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/* ti qpsi register bit masks */
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#define QSPI_TIMEOUT 2000000
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-#define QSPI_FCLK 192000000
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+#define QSPI_FCLK 192000000
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+#define QSPI_DRA7XX_FCLK 76800000
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/* clock control */
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#define QSPI_CLK_EN BIT(31)
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#define QSPI_CLK_DIV_MAX 0xffff
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@@ -101,6 +102,7 @@ struct ti_qspi_priv {
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#endif
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struct ti_qspi_regs *base;
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void *ctrl_mod_mmap;
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+ ulong fclk;
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unsigned int mode;
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u32 cmd;
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u32 dc;
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@@ -113,7 +115,7 @@ static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz)
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if (!hz)
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clk_div = 0;
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else
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- clk_div = (QSPI_FCLK / hz) - 1;
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+ clk_div = (priv->fclk / hz) - 1;
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debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
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@@ -366,8 +368,10 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO;
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priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA;
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+ priv->fclk = QSPI_DRA7XX_FCLK;
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#else
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priv->slave.memory_map = (void *)MMAP_START_ADDR_AM43x;
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+ priv->fclk = QSPI_FCLK;
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#endif
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ti_spi_set_speed(priv, max_hz);
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@@ -520,7 +524,10 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen,
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static int ti_qspi_probe(struct udevice *bus)
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{
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- /* Nothing to do in probe */
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+ struct ti_qspi_priv *priv = dev_get_priv(bus);
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+
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+ priv->fclk = dev_get_driver_data(bus);
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+
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return 0;
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}
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@@ -572,8 +579,8 @@ static const struct dm_spi_ops ti_qspi_ops = {
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};
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static const struct udevice_id ti_qspi_ids[] = {
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- { .compatible = "ti,dra7xxx-qspi" },
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- { .compatible = "ti,am4372-qspi" },
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+ { .compatible = "ti,dra7xxx-qspi", .data = QSPI_DRA7XX_FCLK},
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+ { .compatible = "ti,am4372-qspi", .data = QSPI_FCLK},
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{ }
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};
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