ARM: UniPhier: move DDR related configuration to Kconfig

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

arch/arm/cpu/armv7/uniphier/Kconfig

@@ -32,4 +32,27 @@ config CMD_PINMON
 	  The boot mode pins are latched when the system reset is deasserted
 	  and determine which device the system should load a boot image from.
 
+config DRAM_INIT
+	bool
+	default SPL_BUILD
+
+choice
+	prompt "DDR3 Frequency select"
+	depends on DRAM_INIT
+
+config DDR_FREQ_1600
+	bool "DDR3 1600"
+	depends on MACH_PH1_PRO4 || MACH_PH1_LD4
+
+config DDR_FREQ_1333
+	bool "DDR3 1333"
+	depends on MACH_PH1_LD4 || MACH_PH1_SLD8
+
+endchoice
+
+config DDR_FREQ
+	int
+	default 1333 if DDR_FREQ_1333
+	default 1600 if DDR_FREQ_1600
+
 endmenu

arch/arm/cpu/armv7/uniphier/dram_init.c

@@ -16,7 +16,7 @@ int dram_init(void)
 	DECLARE_GLOBAL_DATA_PTR;
 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
+#ifdef CONFIG_DRAM_INIT
 	led_write(B, 4, , );
 
 	{

arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile

@@ -7,5 +7,4 @@ obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
 		sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o
-obj-$(CONFIG_SPL_BUILD) += pll_spectrum.o \
-	umc_init.o
+obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o

arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c

@@ -149,10 +149,6 @@ int umc_init(void)
 					CONFIG_SDRAM1_SIZE / 0x08000000);
 }
 
-#if CONFIG_DDR_FREQ != 1333 && CONFIG_DDR_FREQ != 1600
-#error Unsupported DDR Frequency.
-#endif
-
 #if (CONFIG_SDRAM0_SIZE == 0x08000000 || CONFIG_SDRAM0_SIZE == 0x10000000) && \
     (CONFIG_SDRAM1_SIZE == 0x08000000 || CONFIG_SDRAM1_SIZE == 0x10000000) && \
     CONFIG_DDR_NUM_CH0 == 1 && CONFIG_DDR_NUM_CH1 == 1

arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile

@@ -7,5 +7,4 @@ obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o sbc_init.o \
 				sg_init.o pll_init.o clkrst_init.o pinctrl.o
-obj-$(CONFIG_SPL_BUILD) += pll_spectrum.o \
-	umc_init.o
+obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o

arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c

@@ -122,10 +122,6 @@ int umc_init(void)
 					CONFIG_SDRAM1_SIZE / 0x08000000);
 }
 
-#if CONFIG_DDR_FREQ != 1600
-#error Unsupported DDR frequency.
-#endif
-
 #if ((CONFIG_SDRAM0_SIZE == 0x20000000 && CONFIG_DDR_NUM_CH0 == 2) || \
      (CONFIG_SDRAM0_SIZE == 0x10000000 && CONFIG_DDR_NUM_CH0 == 1)) && \
     ((CONFIG_SDRAM1_SIZE == 0x20000000 && CONFIG_DDR_NUM_CH1 == 2) || \

arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile

@@ -7,5 +7,4 @@ obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
 		sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o
-obj-$(CONFIG_SPL_BUILD) += pll_spectrum.o \
-	umc_init.o
+obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o

arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c

@@ -129,10 +129,6 @@ int umc_init(void)
 					CONFIG_SDRAM1_SIZE / 0x08000000);
 }
 
-#if CONFIG_DDR_FREQ != 1333
-#error Unsupported DDR frequency.
-#endif
-
 #if (CONFIG_SDRAM0_SIZE == 0x08000000 || CONFIG_SDRAM0_SIZE == 0x10000000) && \
     (CONFIG_SDRAM1_SIZE == 0x08000000 || CONFIG_SDRAM1_SIZE == 0x10000000) && \
     CONFIG_DDR_NUM_CH0 == 1 && CONFIG_DDR_NUM_CH1 == 1

include/configs/ph1_ld4.h

@@ -37,8 +37,6 @@
 #define CONFIG_DDR_NUM_CH0 1
 #define CONFIG_DDR_NUM_CH1 1
 
-#define CONFIG_DDR_FREQ 1600
-
 /*
  * Memory Size & Mapping
  */

include/configs/ph1_pro4.h

@@ -37,8 +37,6 @@
 #define CONFIG_DDR_NUM_CH0 2
 #define CONFIG_DDR_NUM_CH1 2
 
-#define CONFIG_DDR_FREQ 1600
-
 #define CONFIG_UNIPHIER_SMP
 
 /*

include/configs/ph1_sld8.h

@@ -37,8 +37,6 @@
 #define CONFIG_DDR_NUM_CH0 1
 #define CONFIG_DDR_NUM_CH1 1
 
-#define CONFIG_DDR_FREQ 1333
-
 /* #define CONFIG_DDR_STANDARD */
 
 /*