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@@ -0,0 +1,66 @@
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+/*
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+ * Renesas RCar Gen3 memory map tables
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+ *
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+ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <asm/armv8/mmu.h>
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+
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+static struct mm_region r8a7795_mem_map[] = {
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+ {
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+ .virt = 0x0UL,
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+ .phys = 0x0UL,
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+ .size = 0x80000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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+ PTE_BLOCK_INNER_SHARE
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+ }, {
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+ .virt = 0x80000000UL,
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+ .phys = 0x80000000UL,
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+ .size = 0x80000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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+ PTE_BLOCK_NON_SHARE |
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+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
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+ }, {
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+ /* List terminator */
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+ 0,
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+ }
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+};
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+
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+static struct mm_region r8a7796_mem_map[] = {
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+ {
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+ .virt = 0x0UL,
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+ .phys = 0x0UL,
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+ .size = 0xe0000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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+ PTE_BLOCK_INNER_SHARE
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+ }, {
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+ .virt = 0xe0000000UL,
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+ .phys = 0xe0000000UL,
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+ .size = 0xe0000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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+ PTE_BLOCK_NON_SHARE |
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+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
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+ }, {
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+ /* List terminator */
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+ 0,
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+ }
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+};
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+
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+struct mm_region *mem_map = r8a7795_mem_map;
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+
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+void rcar_gen3_memmap_fixup(void)
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+{
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+ u32 cpu_type = rmobile_get_cpu_type();
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+
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+ switch (cpu_type) {
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+ case RMOBILE_CPU_TYPE_R8A7795:
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+ mem_map = r8a7795_mem_map;
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+ break;
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+ case RMOBILE_CPU_TYPE_R8A7796:
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+ mem_map = r8a7796_mem_map;
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+ break;
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+ }
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+}
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