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@@ -14,11 +14,16 @@
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#include <palmas.h>
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#include <sata.h>
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#include <asm/gpio.h>
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+#include <usb.h>
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+#include <linux/usb/gadget.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sata.h>
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#include <environment.h>
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+#include <dwc3-uboot.h>
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+#include <dwc3-omap-uboot.h>
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+#include <ti-usb-phy-uboot.h>
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#include "mux_data.h"
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@@ -123,6 +128,110 @@ int board_mmc_init(bd_t *bis)
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}
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#endif
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+#ifdef CONFIG_USB_DWC3
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+static struct dwc3_device usb_otg_ss1 = {
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+ .maximum_speed = USB_SPEED_SUPER,
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+ .base = DRA7_USB_OTG_SS1_BASE,
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+ .tx_fifo_resize = false,
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+ .index = 0,
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+};
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+
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+static struct dwc3_omap_device usb_otg_ss1_glue = {
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+ .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE,
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+ .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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+ .vbus_id_status = OMAP_DWC3_VBUS_VALID,
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+ .index = 0,
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+};
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+
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+static struct ti_usb_phy_device usb_phy1_device = {
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+ .pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL,
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+ .usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER,
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+ .usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER,
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+ .index = 0,
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+};
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+
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+static struct dwc3_device usb_otg_ss2 = {
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+ .maximum_speed = USB_SPEED_SUPER,
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+ .base = DRA7_USB_OTG_SS2_BASE,
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+ .tx_fifo_resize = false,
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+ .index = 1,
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+};
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+
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+static struct dwc3_omap_device usb_otg_ss2_glue = {
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+ .base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE,
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+ .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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+ .vbus_id_status = OMAP_DWC3_VBUS_VALID,
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+ .index = 1,
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+};
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+
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+static struct ti_usb_phy_device usb_phy2_device = {
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+ .usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER,
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+ .index = 1,
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+};
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+
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+int board_usb_init(int index, enum usb_init_type init)
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+{
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+ switch (index) {
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+ case 0:
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+ if (init == USB_INIT_DEVICE) {
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+ usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
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+ usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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+ } else {
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+ usb_otg_ss1.dr_mode = USB_DR_MODE_HOST;
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+ usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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+ }
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+
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+ ti_usb_phy_uboot_init(&usb_phy1_device);
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+ dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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+ dwc3_uboot_init(&usb_otg_ss1);
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+ break;
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+ case 1:
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+ if (init == USB_INIT_DEVICE) {
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+ usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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+ usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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+ } else {
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+ usb_otg_ss2.dr_mode = USB_DR_MODE_HOST;
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+ usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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+ }
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+
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+ ti_usb_phy_uboot_init(&usb_phy2_device);
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+ dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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+ dwc3_uboot_init(&usb_otg_ss2);
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+ break;
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+ default:
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+ printf("Invalid Controller Index\n");
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+ }
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+
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+ return 0;
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+}
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+
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+int board_usb_cleanup(int index, enum usb_init_type init)
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+{
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+ switch (index) {
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+ case 0:
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+ case 1:
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+ ti_usb_phy_uboot_exit(index);
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+ dwc3_uboot_exit(index);
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+ dwc3_omap_uboot_exit(index);
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+ break;
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+ default:
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+ printf("Invalid Controller Index\n");
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+ }
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+ return 0;
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+}
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+
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+int usb_gadget_handle_interrupts(void)
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+{
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+ u32 status;
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+
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+ status = dwc3_omap_uboot_interrupt_status(0);
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+ if (status)
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+ dwc3_uboot_handle_interrupt(0);
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+
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+ return 0;
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+}
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+#endif
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+
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
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int spl_start_uboot(void)
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{
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