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mx6: Fix use of improper value in enable_ipu_clock

The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize
the CCGR3 register caused an undefined value for CG0.

Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Pierre Aubert 11 years ago
parent
commit
a0a0dacfe8
1 changed files with 1 additions and 1 deletions
  1. 1 1
      arch/arm/cpu/armv7/mx6/clock.c

+ 1 - 1
arch/arm/cpu/armv7/mx6/clock.c

@@ -487,7 +487,7 @@ void enable_ipu_clock(void)
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
 	int reg;
 	int reg;
 	reg = readl(&mxc_ccm->CCGR3);
 	reg = readl(&mxc_ccm->CCGR3);
-	reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET;
+	reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;
 	writel(reg, &mxc_ccm->CCGR3);
 	writel(reg, &mxc_ccm->CCGR3);
 }
 }
 /***************************************************/
 /***************************************************/