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@@ -100,26 +100,38 @@ int cpu_mmc_init(bd_t *bis)
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}
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#endif
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-#if defined(CONFIG_DISPLAY_CPUINFO)
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-const char * const bsel_str[] = {
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- "Reserved",
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- "FPGA (HPS2FPGA Bridge)",
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- "NAND Flash (1.8V)",
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- "NAND Flash (3.0V)",
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- "SD/MMC External Transceiver (1.8V)",
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- "SD/MMC Internal Transceiver (3.0V)",
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- "QSPI Flash (1.8V)",
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- "QSPI Flash (3.0V)",
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+struct {
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+ const char *mode;
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+ const char *name;
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+} bsel_str[] = {
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+ { "rsvd", "Reserved", },
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+ { "fpga", "FPGA (HPS2FPGA Bridge)", },
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+ { "nand", "NAND Flash (1.8V)", },
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+ { "nand", "NAND Flash (3.0V)", },
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+ { "sd", "SD/MMC External Transceiver (1.8V)", },
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+ { "sd", "SD/MMC Internal Transceiver (3.0V)", },
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+ { "qspi", "QSPI Flash (1.8V)", },
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+ { "qspi", "QSPI Flash (3.0V)", },
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};
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/*
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* Print CPU information
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*/
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+#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
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puts("CPU: Altera SoCFPGA Platform\n");
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- printf("BOOT: %s\n", bsel_str[bsel]);
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+ printf("BOOT: %s\n", bsel_str[bsel].name);
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+ return 0;
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+}
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+#endif
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+
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+#ifdef CONFIG_ARCH_MISC_INIT
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+int arch_misc_init(void)
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+{
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+ const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
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+ setenv("bootmode", bsel_str[bsel].mode);
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return 0;
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}
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#endif
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