Home Explore Help
Sign In
coolsoul
/
u-boot
1
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Browse Source

powerpc: E6500: Move macro CONFIG_E6500 to Kconfig

Use Kconfig option E6500 and clean up existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
York Sun 8 years ago
parent
f43417ec97
commit
9ec10107e1
3 changed files with 16 additions and 10 deletions
Unified View Show Diff Stats
  1. 16 0
      arch/powerpc/cpu/mpc85xx/Kconfig
  2. 0 9
      arch/powerpc/include/asm/config_mpc85xx.h
  3. 0 1
      scripts/config_whitelist.txt

+ 16 - 0
arch/powerpc/cpu/mpc85xx/Kconfig
View File 

@@ -330,6 +330,7 @@ endchoice
 
 config ARCH_B4420
 
 config ARCH_B4420
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A004477
 
 	select SYS_FSL_ERRATUM_A004477
 
@@ -350,6 +351,7 @@ config ARCH_B4420
 
 config ARCH_B4860
 
 config ARCH_B4860
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A004477
 
 	select SYS_FSL_ERRATUM_A004477
 
@@ -806,6 +808,7 @@ config ARCH_T1042
 
 config ARCH_T2080
 
 config ARCH_T2080
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A006379
 
 	select SYS_FSL_ERRATUM_A006379
 
@@ -822,6 +825,7 @@ config ARCH_T2080
 
 config ARCH_T2081
 
 config ARCH_T2081
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A006379
 
 	select SYS_FSL_ERRATUM_A006379
 
@@ -838,6 +842,7 @@ config ARCH_T2081
 
 config ARCH_T4160
 
 config ARCH_T4160
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A004468
 
 	select SYS_FSL_ERRATUM_A004468
 
@@ -855,6 +860,7 @@ config ARCH_T4160
 
 config ARCH_T4240
 
 config ARCH_T4240
 
 	bool
 
 	bool
 
 	select E500MC
 
 	select E500MC
 
+	select E6500
 
 	select FSL_LAW
 
 	select FSL_LAW
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_DDR_VER_47
 
 	select SYS_FSL_ERRATUM_A004468
 
 	select SYS_FSL_ERRATUM_A004468
 
@@ -885,6 +891,11 @@ config E500MC
 
 	help
 
 	help
 
 		Enble PowerPC E500MC core
 
 		Enble PowerPC E500MC core
 
 
 
+config E6500
 
+	bool
 
+	help
 
+		Enable PowerPC E6500 core
 
+
 
 config FSL_LAW
 
 config FSL_LAW
 
 	bool
 
 	bool
 
 	help
 
 	help
 
@@ -1165,6 +1176,11 @@ config SYS_FSL_NUM_LAWS
 
 		Number of local access windows. This is fixed per SoC.
 
 		Number of local access windows. This is fixed per SoC.
 
 		If not sure, do not change.
 
 		If not sure, do not change.
 
 
 
+config SYS_FSL_THREADS_PER_CORE
 
+	int
 
+	default 2 if E6500
 
+	default 1
 
+
 
 config SYS_NUM_TLBCAMS
 
 config SYS_NUM_TLBCAMS
 
 	int "Number of TLB CAM entries"
 
 	int "Number of TLB CAM entries"
 
 	default 64 if E500MC
 
 	default 64 if E500MC

+ 0 - 9
arch/powerpc/include/asm/config_mpc85xx.h
View File 

@@ -238,7 +238,6 @@
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 
 
 #elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
 
 #elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
 
-#define CONFIG_E6500
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
@@ -284,7 +283,6 @@
 
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
 
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 
-#define CONFIG_E6500
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
@@ -399,7 +397,6 @@
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 
 
 #elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 
 #elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 
-#define CONFIG_E6500
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */
 
@@ -451,12 +448,6 @@
 
 
 
 #endif
 
 #endif
 
 
 
-#ifdef CONFIG_E6500
 
-#define CONFIG_SYS_FSL_THREADS_PER_CORE 2
 
-#else
 
-#define CONFIG_SYS_FSL_THREADS_PER_CORE 1
 
-#endif
 
-
 
 #if !defined(CONFIG_ARCH_C29X)
 
 #if !defined(CONFIG_ARCH_C29X)
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	1
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	1
 
 #endif
 
 #endif

+ 0 - 1
scripts/config_whitelist.txt
View File 

@@ -5515,7 +5515,6 @@ CONFIG_SYS_FSL_SRIO_OB_WIN_NUM
 
 CONFIG_SYS_FSL_SRIO_OFFSET
 
 CONFIG_SYS_FSL_SRIO_OFFSET
 
 CONFIG_SYS_FSL_SRK_LE
 
 CONFIG_SYS_FSL_SRK_LE
 
 CONFIG_SYS_FSL_TBCLK_DIV
 
 CONFIG_SYS_FSL_TBCLK_DIV
 
-CONFIG_SYS_FSL_THREADS_PER_CORE
 
 CONFIG_SYS_FSL_TIMER_ADDR
 
 CONFIG_SYS_FSL_TIMER_ADDR
 
 CONFIG_SYS_FSL_USB1_ADDR
 
 CONFIG_SYS_FSL_USB1_ADDR
 
 CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 CONFIG_SYS_FSL_USB1_PHY_ENABLE