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@@ -7,7 +7,10 @@
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*/
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#include <common.h>
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+#include <atmel_lcd.h>
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+#include <dm.h>
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#include <fdtdec.h>
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+#include <video.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/clk.h>
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@@ -15,6 +18,21 @@
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#include <bmp_layout.h>
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#include <atmel_lcdc.h>
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+#ifdef CONFIG_DM_VIDEO
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+enum {
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+ /* Maximum LCD size we support */
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+ LCD_MAX_WIDTH = 1366,
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+ LCD_MAX_HEIGHT = 768,
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+ LCD_MAX_LOG2_BPP = VIDEO_BPP16,
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+};
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+#endif
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+
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+struct atmel_fb_priv {
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+ struct display_timing timing;
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+};
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+
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/* configurable parameters */
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#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
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#define ATMEL_LCDC_DMA_BURST_LEN 8
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@@ -31,6 +49,7 @@
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#define lcdc_readl(mmio, reg) __raw_readl((mmio)+(reg))
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#define lcdc_writel(mmio, reg, val) __raw_writel((val), (mmio)+(reg))
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+#ifndef CONFIG_DM_VIDEO
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ushort *configuration_get_cmap(void)
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{
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return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
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@@ -91,6 +110,7 @@ void lcd_set_cmap(struct bmp_image *bmp, unsigned colors)
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lcd_setcolreg(i, cte.red, cte.green, cte.blue);
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}
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}
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+#endif
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static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix,
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bool tft, bool cont_pol_low, ulong lcdbase)
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@@ -190,6 +210,7 @@ static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix,
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(ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
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}
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+#ifndef CONFIG_DM_VIDEO
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void lcd_ctrl_init(void *lcdbase)
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{
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struct display_timing timing;
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@@ -221,3 +242,73 @@ ulong calc_fbsize(void)
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return ((panel_info.vl_col * panel_info.vl_row *
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NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
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}
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+#endif
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+
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+#ifdef CONFIG_DM_VIDEO
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+static int atmel_fb_lcd_probe(struct udevice *dev)
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+{
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+ struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
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+ struct video_priv *uc_priv = dev_get_uclass_priv(dev);
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+ struct atmel_fb_priv *priv = dev_get_priv(dev);
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+ struct display_timing *timing = &priv->timing;
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+
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+ /*
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+ * For now some values are hard-coded. We could use the device tree
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+ * bindings in simple-framebuffer.txt to specify the format/bpp and
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+ * some Atmel-specific binding for tft and cont_pol_low.
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+ */
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+ atmel_fb_init(ATMEL_BASE_LCDC, timing, VIDEO_BPP16, true, false,
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+ uc_plat->base);
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+ uc_priv->xsize = timing->hactive.typ;
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+ uc_priv->ysize = timing->vactive.typ;
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+ uc_priv->bpix = VIDEO_BPP16;
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+ video_set_flush_dcache(dev, true);
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+ debug("LCD frame buffer at %lx, size %x, %dx%d pixels\n", uc_plat->base,
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+ uc_plat->size, uc_priv->xsize, uc_priv->ysize);
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+
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+ return 0;
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+}
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+
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+static int atmel_fb_ofdata_to_platdata(struct udevice *dev)
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+{
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+ struct atmel_lcd_platdata *plat = dev_get_platdata(dev);
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+ struct atmel_fb_priv *priv = dev_get_priv(dev);
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+ struct display_timing *timing = &priv->timing;
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+ const void *blob = gd->fdt_blob;
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+
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+ if (fdtdec_decode_display_timing(blob, dev->of_offset,
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+ plat->timing_index, timing)) {
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+ debug("%s: Failed to decode display timing\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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+}
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+
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+static int atmel_fb_lcd_bind(struct udevice *dev)
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+{
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+ struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
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+
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+ uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
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+ (1 << VIDEO_BPP16) / 8;
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+ debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
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+
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+ return 0;
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+}
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+
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+static const struct udevice_id atmel_fb_lcd_ids[] = {
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+ { .compatible = "atmel,at91sam9g45-lcdc" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(atmel_fb) = {
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+ .name = "atmel_fb",
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+ .id = UCLASS_VIDEO,
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+ .of_match = atmel_fb_lcd_ids,
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+ .bind = atmel_fb_lcd_bind,
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+ .ofdata_to_platdata = atmel_fb_ofdata_to_platdata,
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+ .probe = atmel_fb_lcd_probe,
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+ .platdata_auto_alloc_size = sizeof(struct atmel_lcd_platdata),
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+ .priv_auto_alloc_size = sizeof(struct atmel_fb_priv),
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+};
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+#endif
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