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Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"

This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892.

I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much.  8KB memory for SPL is
actually too big for some boards.  Perhaps 0x800 is enough, but the
situation varies board by board.

Let's postpone our decision until we come up with a better idea.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada 8 years ago
parent
commit
9b1b6d4225

+ 0 - 1
Kconfig

@@ -83,7 +83,6 @@ config SYS_MALLOC_F
 config SYS_MALLOC_F_LEN
 	hex "Size of malloc() pool before relocation"
 	depends on SYS_MALLOC_F
-	default 0x2000 if SPL_DM && SPL_OF_CONTROL
 	default 0x400
 	help
 	  Before relocation, memory is very limited on many platforms. Still,

+ 1 - 0
configs/clearfog_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_CLEARFOG=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y

+ 1 - 0
configs/db-88f6720_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6720=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/db-88f6820-gp_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_GP=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/db-mv784mp-gp_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_MV784MP_GP=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/ds414_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DS414=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/maxbcm_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MAXBCM=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/sandbox_spl_defconfig

@@ -1,5 +1,6 @@
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

+ 1 - 0
configs/socfpga_arria5_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"

+ 1 - 0
configs/socfpga_cyclone5_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"

+ 1 - 0
configs/socfpga_de0_nano_soc_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"

+ 1 - 0
configs/socfpga_is1_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_IS1=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"

+ 1 - 0
configs/socfpga_mcvevk_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"

+ 1 - 0
configs/socfpga_sockit_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"

+ 1 - 0
configs/socfpga_socrates_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"

+ 1 - 0
configs/socfpga_sr1500_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_SR1500=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"

+ 1 - 0
configs/socfpga_vining_fpga_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"

+ 1 - 0
configs/theadorable_debug_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_THEADORABLE=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/theadorable_defconfig

@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_THEADORABLE=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y

+ 1 - 0
configs/uniphier_ld11_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ARCH_UNIPHIER_LD11=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000

+ 1 - 0
configs/uniphier_ld20_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ARCH_UNIPHIER_LD20=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000

+ 1 - 0
configs/uniphier_ld4_sld8_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ARCH_UNIPHIER_LD4_SLD8=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000

+ 1 - 0
configs/uniphier_pro4_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"

+ 1 - 0
configs/uniphier_pxs2_ld6b_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000

+ 1 - 0
configs/uniphier_sld3_defconfig

@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ARCH_UNIPHIER_SLD3=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000