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@@ -151,6 +151,9 @@ int gpio_direction_output(unsigned gpio, int value)
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#endif
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#ifdef CONFIG_DM_GPIO
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+#include <fdtdec.h>
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+DECLARE_GLOBAL_DATA_PTR;
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+
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static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
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{
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u32 val;
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@@ -259,23 +262,6 @@ static const struct dm_gpio_ops gpio_mxc_ops = {
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.get_function = mxc_gpio_get_function,
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};
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-static const struct mxc_gpio_plat mxc_plat[] = {
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- { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
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- { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
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- { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
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-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
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- defined(CONFIG_MX53) || defined(CONFIG_MX6)
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- { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
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-#endif
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-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
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- { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
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- { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
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-#endif
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-#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
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- { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
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-#endif
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-};
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-
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static int mxc_gpio_probe(struct udevice *dev)
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{
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struct mxc_bank_info *bank = dev_get_priv(dev);
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@@ -296,12 +282,72 @@ static int mxc_gpio_probe(struct udevice *dev)
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return 0;
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}
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+static int mxc_gpio_bind(struct udevice *dev)
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+{
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+ struct mxc_gpio_plat *plat = dev->platdata;
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+ fdt_addr_t addr;
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+
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+ /*
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+ * If platdata already exsits, directly return.
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+ * Actually only when DT is not supported, platdata
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+ * is statically initialized in U_BOOT_DEVICES.Here
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+ * will return.
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+ */
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+ if (plat)
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+ return 0;
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+
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+ addr = dev_get_addr(dev);
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+ if (addr == FDT_ADDR_T_NONE)
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+ return -ENODEV;
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+
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+ /*
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+ * TODO:
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+ * When every board is converted to driver model and DT is supported,
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+ * this can be done by auto-alloc feature, but not using calloc
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+ * to alloc memory for platdata.
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+ */
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+ plat = calloc(1, sizeof(*plat));
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+ if (!plat)
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+ return -ENOMEM;
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+
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+ plat->regs = (struct gpio_regs *)addr;
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+ plat->bank_index = dev->req_seq;
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+ dev->platdata = plat;
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+
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+ return 0;
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+}
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+
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+static const struct udevice_id mxc_gpio_ids[] = {
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+ { .compatible = "fsl,imx35-gpio" },
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+ { }
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+};
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+
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U_BOOT_DRIVER(gpio_mxc) = {
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.name = "gpio_mxc",
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.id = UCLASS_GPIO,
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.ops = &gpio_mxc_ops,
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.probe = mxc_gpio_probe,
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.priv_auto_alloc_size = sizeof(struct mxc_bank_info),
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+ .of_match = mxc_gpio_ids,
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+ .bind = mxc_gpio_bind,
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+};
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+
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+#ifndef CONFIG_OF_CONTROL
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+static const struct mxc_gpio_plat mxc_plat[] = {
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+ { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
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+ { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
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+ { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
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+#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
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+ defined(CONFIG_MX53) || defined(CONFIG_MX6)
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+ { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
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+#endif
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+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
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+ { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
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+ { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
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+#endif
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+#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
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+ { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
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+#endif
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};
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U_BOOT_DEVICES(mxc_gpios) = {
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@@ -321,3 +367,4 @@ U_BOOT_DEVICES(mxc_gpios) = {
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#endif
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};
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#endif
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+#endif
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