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@@ -1,7 +1,7 @@
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/*
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* Copyright (C) 2016 Socionext Inc.
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*
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- * based on commit a7a36122aa072fe1bb06e02b73b3634b7a6c555a of Diag
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+ * based on commit 5e1cb0f1caeabc6c99469dd997cb6b4f46834443 of Diag
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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@@ -264,8 +264,8 @@ static int ddrphy_ip_dq_shift_val[DRAM_BOARD_NR][DRAM_CH_NR][32] = {
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static void ddrphy_select_lane(void __iomem *phy_base, unsigned int lane,
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unsigned int bit)
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{
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- WARN_ON(lane >= (1 << PHY_LANE_SEL_LANE_WIDTH));
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- WARN_ON(bit >= (1 << PHY_LANE_SEL_BIT_WIDTH));
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+ WARN_ON(lane >= 1 << PHY_LANE_SEL_LANE_WIDTH);
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+ WARN_ON(bit >= 1 << PHY_LANE_SEL_BIT_WIDTH);
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writel((bit << PHY_LANE_SEL_BIT_SHIFT) |
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(lane << PHY_LANE_SEL_LANE_SHIFT),
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