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@@ -5,6 +5,7 @@
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*/
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#include <common.h>
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+#include <dm.h>
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#include <malloc.h>
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#include <spi.h>
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#include <linux/errno.h>
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@@ -14,6 +15,8 @@
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#include <asm/arch/clock.h>
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#include <asm/mach-imx/spi.h>
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+DECLARE_GLOBAL_DATA_PTR;
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+
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#ifdef CONFIG_MX27
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/* i.MX27 has a completely wrong register layout and register definitions in the
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* datasheet, the correct one is in the Freescale's Linux driver */
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@@ -22,10 +25,6 @@
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"See linux mxc_spi driver from Freescale for details."
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#endif
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-static unsigned long spi_bases[] = {
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- MXC_SPI_BASE_ADDRESSES
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-};
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-
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__weak int board_spi_cs_gpio(unsigned bus, unsigned cs)
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{
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return -1;
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@@ -51,6 +50,7 @@ struct mxc_spi_slave {
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int ss_pol;
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unsigned int max_hz;
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unsigned int mode;
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+ struct gpio_desc ss;
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};
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static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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@@ -58,19 +58,24 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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return container_of(slave, struct mxc_spi_slave, slave);
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}
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-void spi_cs_activate(struct spi_slave *slave)
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+static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs)
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{
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- struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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- if (mxcs->gpio > 0)
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- gpio_set_value(mxcs->gpio, mxcs->ss_pol);
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+ if (CONFIG_IS_ENABLED(DM_SPI)) {
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+ dm_gpio_set_value(&mxcs->ss, mxcs->ss_pol);
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+ } else {
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+ if (mxcs->gpio > 0)
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+ gpio_set_value(mxcs->gpio, mxcs->ss_pol);
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+ }
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}
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-void spi_cs_deactivate(struct spi_slave *slave)
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+static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs)
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{
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- struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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- if (mxcs->gpio > 0)
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- gpio_set_value(mxcs->gpio,
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- !(mxcs->ss_pol));
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+ if (CONFIG_IS_ENABLED(DM_SPI)) {
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+ dm_gpio_set_value(&mxcs->ss, !(mxcs->ss_pol));
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+ } else {
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+ if (mxcs->gpio > 0)
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+ gpio_set_value(mxcs->gpio, !(mxcs->ss_pol));
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+ }
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}
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u32 get_cspi_div(u32 div)
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@@ -211,10 +216,9 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
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}
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#endif
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-int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
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+int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen,
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const u8 *dout, u8 *din, unsigned long flags)
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{
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- struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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int nbytes = DIV_ROUND_UP(bitlen, 8);
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u32 data, cnt, i;
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struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
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@@ -327,8 +331,9 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
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}
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-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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- void *din, unsigned long flags)
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+static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs,
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+ unsigned int bitlen, const void *dout,
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+ void *din, unsigned long flags)
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{
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int n_bytes = DIV_ROUND_UP(bitlen, 8);
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int n_bits;
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@@ -337,11 +342,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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u8 *p_outbuf = (u8 *)dout;
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u8 *p_inbuf = (u8 *)din;
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- if (!slave)
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- return -1;
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+ if (!mxcs)
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+ return -EINVAL;
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if (flags & SPI_XFER_BEGIN)
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- spi_cs_activate(slave);
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+ mxc_spi_cs_activate(mxcs);
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while (n_bytes > 0) {
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if (n_bytes < MAX_SPI_BYTES)
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@@ -351,7 +356,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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n_bits = blk_size * 8;
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- ret = spi_xchg_single(slave, n_bits, p_outbuf, p_inbuf, 0);
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+ ret = spi_xchg_single(mxcs, n_bits, p_outbuf, p_inbuf, 0);
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if (ret)
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return ret;
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@@ -363,12 +368,39 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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}
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if (flags & SPI_XFER_END) {
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- spi_cs_deactivate(slave);
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+ mxc_spi_cs_deactivate(mxcs);
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}
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return 0;
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}
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+static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs)
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+{
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+ struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
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+ int ret;
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+
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+ reg_write(®s->rxdata, 1);
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+ udelay(1);
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+ ret = spi_cfg_mxc(mxcs, cs);
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+ if (ret) {
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+ printf("mxc_spi: cannot setup SPI controller\n");
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+ return ret;
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+ }
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+ reg_write(®s->period, MXC_CSPIPERIOD_32KHZ);
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+ reg_write(®s->intr, 0);
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+
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+ return 0;
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+}
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+
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+#ifndef CONFIG_DM_SPI
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+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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+ void *din, unsigned long flags)
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+{
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+ struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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+
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+ return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
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+}
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+
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void spi_init(void)
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{
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}
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@@ -390,6 +422,7 @@ static int setup_cs_gpio(struct mxc_spi_slave *mxcs,
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if (mxcs->gpio == -1)
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return 0;
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+ gpio_request(mxcs->gpio, "spi-cs");
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ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol));
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if (ret) {
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printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio);
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@@ -399,6 +432,10 @@ static int setup_cs_gpio(struct mxc_spi_slave *mxcs,
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return 0;
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}
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+static unsigned long spi_bases[] = {
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+ MXC_SPI_BASE_ADDRESSES
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+};
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+
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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@@ -443,24 +480,104 @@ void spi_free_slave(struct spi_slave *slave)
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int spi_claim_bus(struct spi_slave *slave)
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{
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- int ret;
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struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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- struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
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- reg_write(®s->rxdata, 1);
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- udelay(1);
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- ret = spi_cfg_mxc(mxcs, slave->cs);
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+ return mxc_spi_claim_bus_internal(mxcs, slave->cs);
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+}
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+
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+void spi_release_bus(struct spi_slave *slave)
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+{
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+ /* TODO: Shut the controller down */
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+}
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+#else
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+
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+static int mxc_spi_probe(struct udevice *bus)
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+{
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+ struct mxc_spi_slave *plat = bus->platdata;
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+ struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
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+ int node = dev_of_offset(bus);
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+ const void *blob = gd->fdt_blob;
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+ int ret;
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+
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+ if (gpio_request_by_name(bus, "cs-gpios", 0, &plat->ss,
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+ GPIOD_IS_OUT)) {
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+ dev_err(bus, "No cs-gpios property\n");
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+ return -EINVAL;
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+ }
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+
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+ plat->base = dev_get_addr(bus);
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+ if (plat->base == FDT_ADDR_T_NONE)
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+ return -ENODEV;
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+
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+ ret = dm_gpio_set_value(&plat->ss, !(mxcs->ss_pol));
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if (ret) {
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- printf("mxc_spi: cannot setup SPI controller\n");
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+ dev_err(bus, "Setting cs error\n");
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return ret;
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}
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- reg_write(®s->period, MXC_CSPIPERIOD_32KHZ);
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- reg_write(®s->intr, 0);
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+
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+ mxcs->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
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+ 20000000);
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return 0;
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}
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-void spi_release_bus(struct spi_slave *slave)
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+static int mxc_spi_xfer(struct udevice *dev, unsigned int bitlen,
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+ const void *dout, void *din, unsigned long flags)
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{
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- /* TODO: Shut the controller down */
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+ struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
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+
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+
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+ return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
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+}
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+
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+static int mxc_spi_claim_bus(struct udevice *dev)
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+{
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+ struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
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+ struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
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+
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+ return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs);
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}
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+
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+static int mxc_spi_release_bus(struct udevice *dev)
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+{
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+ return 0;
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+}
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+
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+static int mxc_spi_set_speed(struct udevice *bus, uint speed)
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+{
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+ /* Nothing to do */
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+ return 0;
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+}
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+
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+static int mxc_spi_set_mode(struct udevice *bus, uint mode)
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+{
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+ struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
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+
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+ mxcs->mode = mode;
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+ mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0;
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+
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+ return 0;
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+}
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+
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+static const struct dm_spi_ops mxc_spi_ops = {
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+ .claim_bus = mxc_spi_claim_bus,
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+ .release_bus = mxc_spi_release_bus,
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+ .xfer = mxc_spi_xfer,
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+ .set_speed = mxc_spi_set_speed,
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+ .set_mode = mxc_spi_set_mode,
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+};
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+
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+static const struct udevice_id mxc_spi_ids[] = {
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+ { .compatible = "fsl,imx51-ecspi" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(mxc_spi) = {
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+ .name = "mxc_spi",
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+ .id = UCLASS_SPI,
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+ .of_match = mxc_spi_ids,
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+ .ops = &mxc_spi_ops,
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+ .platdata_auto_alloc_size = sizeof(struct mxc_spi_slave),
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+ .probe = mxc_spi_probe,
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+};
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+#endif
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