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@@ -14,7 +14,7 @@
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#include <asm/arch/rmobile.h>
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#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
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-/* QoS version 0.20 */
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+/* QoS version 0.311 */
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enum {
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DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
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DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
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@@ -61,6 +61,24 @@ static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
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[DBSC3_15] = DBSC3_0_QOS_W15_BASE,
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};
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+#if defined(CONFIG_QOS_PRI_MEDIA)
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+#define is_qos_pri_media() 1
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+#else
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+#define is_qos_pri_media() 0
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+#endif
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+
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+#if defined(CONFIG_QOS_PRI_NORMAL)
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+#define is_qos_pri_normal() 1
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+#else
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+#define is_qos_pri_normal() 0
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+#endif
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+
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+#if defined(CONFIG_QOS_PRI_GFX)
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+#define is_qos_pri_gfx() 1
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+#else
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+#define is_qos_pri_gfx() 0
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+#endif
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+
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void qos_init(void)
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{
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int i;
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@@ -77,34 +95,62 @@ void qos_init(void)
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/* S3C -QoS */
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s3c = (struct rcar_s3c *)S3C_BASE;
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writel(0x00000000, &s3c->s3cadsplcr);
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- writel(0x1F0B0908, &s3c->s3crorr);
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- writel(0x1F0C0A08, &s3c->s3cworr);
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-
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+ if (is_qos_pri_media()) {
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+ writel(0x1F0B0604, &s3c->s3crorr);
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+ writel(0x1F0E0705, &s3c->s3cworr);
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+ } else if (is_qos_pri_normal()) {
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+ writel(0x1F0B0908, &s3c->s3crorr);
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+ writel(0x1F0C0A08, &s3c->s3cworr);
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+ } else if (is_qos_pri_gfx()) {
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+ writel(0x1F0B0B0B, &s3c->s3crorr);
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+ writel(0x1F0E0C0C, &s3c->s3cworr);
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+ }
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/* QoS Control Registers */
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s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
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writel(0x00890089, &s3c_qos->s3cqos0);
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writel(0x20960010, &s3c_qos->s3cqos1);
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writel(0x20302030, &s3c_qos->s3cqos2);
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- writel(0x20AA2200, &s3c_qos->s3cqos3);
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+ if (is_qos_pri_media())
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+ writel(0x20AA2300, &s3c_qos->s3cqos3);
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+ else if (is_qos_pri_normal())
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+ writel(0x20AA2200, &s3c_qos->s3cqos3);
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+ else if (is_qos_pri_gfx())
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+ writel(0x20AA2100, &s3c_qos->s3cqos3);
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writel(0x00002032, &s3c_qos->s3cqos4);
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writel(0x20960010, &s3c_qos->s3cqos5);
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writel(0x20302030, &s3c_qos->s3cqos6);
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- writel(0x20AA2200, &s3c_qos->s3cqos7);
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+ if (is_qos_pri_media())
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+ writel(0x20AA2300, &s3c_qos->s3cqos7);
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+ else if (is_qos_pri_normal())
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+ writel(0x20AA2200, &s3c_qos->s3cqos7);
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+ else if (is_qos_pri_gfx())
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+ writel(0x20AA2100, &s3c_qos->s3cqos7);
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writel(0x00002032, &s3c_qos->s3cqos8);
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s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
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writel(0x00890089, &s3c_qos->s3cqos0);
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writel(0x20960010, &s3c_qos->s3cqos1);
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writel(0x20302030, &s3c_qos->s3cqos2);
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- writel(0x20AA2200, &s3c_qos->s3cqos3);
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+ if (is_qos_pri_media())
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+ writel(0x20AA2300, &s3c_qos->s3cqos3);
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+ else if (is_qos_pri_normal())
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+ writel(0x20AA2200, &s3c_qos->s3cqos3);
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+ else if (is_qos_pri_gfx())
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+ writel(0x20AA2100, &s3c_qos->s3cqos3);
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writel(0x00002032, &s3c_qos->s3cqos4);
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writel(0x20960010, &s3c_qos->s3cqos5);
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writel(0x20302030, &s3c_qos->s3cqos6);
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- writel(0x20AA2200, &s3c_qos->s3cqos7);
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+ if (is_qos_pri_media())
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+ writel(0x20AA2300, &s3c_qos->s3cqos7);
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+ else if (is_qos_pri_normal())
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+ writel(0x20AA2200, &s3c_qos->s3cqos7);
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+ else if (is_qos_pri_gfx())
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+ writel(0x20AA2100, &s3c_qos->s3cqos7);
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+ writel(0x00002032, &s3c_qos->s3cqos4);
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writel(0x00002032, &s3c_qos->s3cqos8);
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s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
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- writel(0x00820082, &s3c_qos->s3cqos0);
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+ writel(0x00820092, &s3c_qos->s3cqos0);
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writel(0x20960020, &s3c_qos->s3cqos1);
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writel(0x20302030, &s3c_qos->s3cqos2);
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writel(0x20AA20DC, &s3c_qos->s3cqos3);
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@@ -115,7 +161,7 @@ void qos_init(void)
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writel(0x00002032, &s3c_qos->s3cqos8);
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s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
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- writel(0x00820082, &s3c_qos->s3cqos0);
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+ writel(0x00820092, &s3c_qos->s3cqos0);
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writel(0x20960020, &s3c_qos->s3cqos1);
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writel(0x20302030, &s3c_qos->s3cqos2);
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writel(0x20AA20FA, &s3c_qos->s3cqos3);
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@@ -166,11 +212,13 @@ void qos_init(void)
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/* Transaction Control (MXI) */
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mxi = (struct rcar_mxi *)MXI_BASE;
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writel(0x00000013, &mxi->mxrtcr);
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- writel(0x00000013, &mxi->mxwtcr);
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+ writel(0x00000016, &mxi->mxwtcr);
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writel(0x00200000, &mxi->mxs3cracr);
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writel(0x00200000, &mxi->mxs3cwacr);
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writel(0x00200000, &mxi->mxaxiracr);
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writel(0x00200000, &mxi->mxaxiwacr);
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+ writel(0x00780080, &mxi->mxsaar0);
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+ writel(0x02000800, &mxi->mxsaar1);
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/* QoS Control (MXI) */
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mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
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@@ -554,7 +602,7 @@ void qos_init(void)
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/* QoS Register (RT-AXI) */
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axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
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- writel(0x00000000, &axi_qos->qosconf);
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+ writel(0x00000001, &axi_qos->qosconf);
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writel(0x00002053, &axi_qos->qosctset0);
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writel(0x00002096, &axi_qos->qosctset1);
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writel(0x00002030, &axi_qos->qosctset2);
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