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@@ -133,12 +133,22 @@ static inline void serial_putc(char c)
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}
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-/* Max SCLK can be 133MHz ... dividing that by 4 gives
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- * us a freq of 33MHz for SPI which should generally be
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+/* Max SCLK can be 133MHz ... dividing that by (2*4) gives
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+ * us a freq of 16MHz for SPI which should generally be
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* slow enough for the slow reads the bootrom uses.
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*/
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+#if !defined(CONFIG_SPI_FLASH_SLOW_READ) && \
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+ ((defined(__ADSPBF52x__) && __SILICON_REVISION__ >= 2) || \
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+ (defined(__ADSPBF54x__) && __SILICON_REVISION__ >= 1))
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+# define BOOTROM_SUPPORTS_SPI_FAST_READ 1
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+#else
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+# define BOOTROM_SUPPORTS_SPI_FAST_READ 0
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+#endif
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#ifndef CONFIG_SPI_BAUD_INITBLOCK
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-# define CONFIG_SPI_BAUD_INITBLOCK 4
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+# define CONFIG_SPI_BAUD_INITBLOCK (BOOTROM_SUPPORTS_SPI_FAST_READ ? 2 : 4)
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+#endif
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+#ifdef SPI0_BAUD
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+# define bfin_write_SPI_BAUD bfin_write_SPI0_BAUD
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#endif
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/* PLL_DIV defines */
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@@ -254,12 +264,11 @@ void initcode(ADI_BOOT_DATA *bootstruct)
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* boot. Once we switch over to u-boot's SPI flash driver, we'll
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* increase the speed appropriately.
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*/
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- if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
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-#ifdef SPI0_BAUD
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- bfin_write_SPI0_BAUD(CONFIG_SPI_BAUD_INITBLOCK);
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-#else
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+ if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) {
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+ if (BOOTROM_SUPPORTS_SPI_FAST_READ && CONFIG_SPI_BAUD_INITBLOCK < 4)
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+ bootstruct->dFlags |= BFLAG_FASTREAD;
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bfin_write_SPI_BAUD(CONFIG_SPI_BAUD_INITBLOCK);
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-#endif
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+ }
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serial_putc('B');
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