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@@ -19,11 +19,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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-struct rk3036_clk_priv {
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- struct rk3036_cru *cru;
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- ulong rate;
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-};
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-
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enum {
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VCO_MAX_HZ = 2400U * 1000000,
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VCO_MIN_HZ = 600 * 1000000,
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@@ -49,23 +44,6 @@ enum {
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static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
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static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
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-void *rockchip_get_cru(void)
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-{
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- struct udevice *dev;
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- fdt_addr_t addr;
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- int ret;
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-
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- ret = uclass_get_device(UCLASS_CLK, 0, &dev);
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- if (ret)
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- return ERR_PTR(ret);
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-
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- addr = dev_get_addr(dev);
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- if (addr == FDT_ADDR_T_NONE)
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- return ERR_PTR(-EINVAL);
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-
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- return (void *)addr;
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-}
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-
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static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
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const struct pll_div *div)
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{
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@@ -371,7 +349,7 @@ static const struct udevice_id rk3036_clk_ids[] = {
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{ }
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};
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-U_BOOT_DRIVER(clk_rk3036) = {
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+U_BOOT_DRIVER(rockchip_rk3036_cru) = {
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.name = "clk_rk3036",
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.id = UCLASS_CLK,
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.of_match = rk3036_clk_ids,
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