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@@ -496,8 +496,8 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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return ret;
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}
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-static void uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,
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- struct mmc *mmc)
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+static int uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,
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+ struct mmc *mmc)
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{
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u32 val, tmp;
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@@ -512,14 +512,15 @@ static void uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,
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val = UNIPHIER_SD_OPTION_WIDTH_8;
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break;
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default:
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- BUG();
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- break;
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+ return -EINVAL;
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}
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tmp = readl(priv->regbase + UNIPHIER_SD_OPTION);
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tmp &= ~UNIPHIER_SD_OPTION_WIDTH_MASK;
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tmp |= val;
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writel(tmp, priv->regbase + UNIPHIER_SD_OPTION);
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+
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+ return 0;
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}
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static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv,
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@@ -587,11 +588,14 @@ static int uniphier_sd_set_ios(struct udevice *dev)
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{
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struct uniphier_sd_priv *priv = dev_get_priv(dev);
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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+ int ret;
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dev_dbg(dev, "clock %uHz, DDRmode %d, width %u\n",
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mmc->clock, mmc->ddr_mode, mmc->bus_width);
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- uniphier_sd_set_bus_width(priv, mmc);
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+ ret = uniphier_sd_set_bus_width(priv, mmc);
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+ if (ret)
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+ return ret;
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uniphier_sd_set_ddr_mode(priv, mmc);
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uniphier_sd_set_clk_rate(priv, mmc);
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