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arm: socfpga: spl: update peripheral pll for dev kit

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Dinh Nguyen 10 年之前
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共有 1 个文件被更改,包括 1 次插入1 次删除
  1. 1 1
      board/altera/socfpga/pll_config.h

+ 1 - 1
board/altera/socfpga/pll_config.h

@@ -36,7 +36,7 @@
 
 
 /* Peripheral PLL */
 /* Peripheral PLL */
 #define CONFIG_HPS_PERPLLGRP_VCO_DENOM			(1)
 #define CONFIG_HPS_PERPLLGRP_VCO_DENOM			(1)
-#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(39)
+#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(79)
 /*
 /*
  * To tell where is the VCOs source:
  * To tell where is the VCOs source:
  * 0 = EOSC1
  * 0 = EOSC1