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@@ -1032,19 +1032,23 @@ static void rw_mgr_mem_handoff(void)
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*/
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}
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-/*
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- * issue write test command.
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- * two variants are provided. one that just tests a write pattern and
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- * another that tests datamask functionality.
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+
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+/**
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+ * rw_mgr_mem_calibrate_write_test_issue() - Issue write test command
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+ * @group: Write Group
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+ * @use_dm: Use DM
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+ *
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+ * Issue write test command. Two variants are provided, one that just tests
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+ * a write pattern and another that tests datamask functionality.
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*/
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-static void rw_mgr_mem_calibrate_write_test_issue(uint32_t group,
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- uint32_t test_dm)
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+static void rw_mgr_mem_calibrate_write_test_issue(u32 group,
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+ u32 test_dm)
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{
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- uint32_t mcc_instruction;
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- uint32_t quick_write_mode = (((STATIC_CALIB_STEPS) & CALIB_SKIP_WRITES) &&
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- ENABLE_SUPER_QUICK_CALIBRATION);
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- uint32_t rw_wl_nop_cycles;
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- uint32_t addr;
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+ const u32 quick_write_mode =
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+ (STATIC_CALIB_STEPS & CALIB_SKIP_WRITES) &&
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+ ENABLE_SUPER_QUICK_CALIBRATION;
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+ u32 mcc_instruction;
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+ u32 rw_wl_nop_cycles;
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/*
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* Set counter and jump addresses for the right
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@@ -1164,8 +1168,9 @@ static void rw_mgr_mem_calibrate_write_test_issue(uint32_t group,
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&sdr_rw_load_jump_mgr_regs->load_jump_add1);
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}
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- addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_SINGLE_GROUP_OFFSET;
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- writel(mcc_instruction, addr + (group << 2));
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+ writel(mcc_instruction, (SDR_PHYGRP_RWMGRGRP_ADDRESS |
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+ RW_MGR_RUN_SINGLE_GROUP_OFFSET) +
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+ (group << 2));
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}
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/**
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