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@@ -143,6 +143,31 @@ void at91_spi1_hw_init(unsigned long cs_mask)
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}
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#endif
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+#if defined(CONFIG_GENERIC_ATMEL_MCI)
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+void at91_mci_hw_init(void)
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+{
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+ /* Enable mci clock */
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+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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+ writel(1 << ATMEL_ID_MCI1, &pmc->pcer);
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+
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+ at91_set_a_periph(AT91_PIO_PORTA, 6, PUP); /* MCI1_CK */
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+
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+#if defined(CONFIG_ATMEL_MCI_PORTB)
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+ at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* MCI1_CDB */
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+ at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* MCI1_DB0 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 23, PUP); /* MCI1_DB1 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 24, PUP); /* MCI1_DB2 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* MCI1_DB3 */
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+#else
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+ at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* MCI1_CDA */
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+ at91_set_a_periph(AT91_PIO_PORTA, 8, PUP); /* MCI1_DA0 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 9, PUP); /* MCI1_DA1 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 10, PUP); /* MCI1_DA2 */
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+ at91_set_a_periph(AT91_PIO_PORTA, 11, PUP); /* MCI1_DA3 */
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+#endif
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+}
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+#endif
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+
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#ifdef CONFIG_MACB
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void at91_macb_hw_init(void)
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{
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