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@@ -17,6 +17,15 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
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writel(0, ram_address);
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}
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+static int ddr2_decodtype_is_seq(u32 cr)
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+{
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+#if defined(CONFIG_SAMA5D3)
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+ if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
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+ return 0;
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+#endif
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+ return 1;
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+}
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+
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int ddr2_init(const unsigned int ram_address,
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const struct atmel_mpddr *mpddr_value)
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{
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@@ -25,7 +34,7 @@ int ddr2_init(const unsigned int ram_address,
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/* Compute bank offset according to NC in configuration register */
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ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
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- if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
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+ if (ddr2_decodtype_is_seq(mpddr_value->cr))
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ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
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ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;
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