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@@ -237,6 +237,14 @@ struct cm_perpll {
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unsigned int cpswclkstctrl; /* offset 0x144 */
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unsigned int lcdcclkstctrl; /* offset 0x148 */
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};
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+
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+/* Encapsulating Display pll registers */
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+struct cm_dpll {
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+ unsigned int resv1[2];
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+ unsigned int clktimer2clk; /* offset 0x08 */
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+ unsigned int resv2[10];
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+ unsigned int clklcdcpixelclk; /* offset 0x34 */
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+};
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#else
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/* Encapsulating core pll registers */
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struct cm_wkuppll {
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@@ -392,15 +400,12 @@ struct cm_perpll {
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unsigned int resv40[7];
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unsigned int cpgmac0clkctrl; /* offset 0xB20 */
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};
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-#endif /* CONFIG_AM43XX */
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-/* Encapsulating Display pll registers */
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struct cm_dpll {
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- unsigned int resv1[2];
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- unsigned int clktimer2clk; /* offset 0x08 */
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- unsigned int resv2[10];
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- unsigned int clklcdcpixelclk; /* offset 0x34 */
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+ unsigned int resv1;
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+ unsigned int clktimer2clk; /* offset 0x04 */
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};
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+#endif /* CONFIG_AM43XX */
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/* Control Module RTC registers */
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struct cm_rtc {
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