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@@ -36,8 +36,7 @@ void clock_init_safe(void)
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CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
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CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
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&ccm->cpu_ahb_apb0_cfg);
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&ccm->cpu_ahb_apb0_cfg);
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#ifdef CONFIG_SUN7I
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#ifdef CONFIG_SUN7I
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- writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
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- &ccm->ahb_gate0);
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+ setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
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#endif
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#endif
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writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
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writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
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}
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}
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