ARM: rmobile: Fix the memory map on Gen3

Fix up the memory map on Gen3 to match datasheet properly.
This simplifies the memory map setup as well, since we do
no longer need this massive complexity.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

arch/arm/mach-rmobile/cpu_info.c

@@ -18,9 +18,6 @@ int arch_cpu_init(void)
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
-#if defined(CONFIG_RCAR_GEN3)
-	rcar_gen3_memmap_fixup();
-#endif
 	dcache_enable();
 }
 #endif

arch/arm/mach-rmobile/include/mach/rmobile.h

@@ -41,7 +41,6 @@
 u32 rmobile_get_cpu_type(void);
 u32 rmobile_get_cpu_rev_integer(void);
 u32 rmobile_get_cpu_rev_fraction(void);
-void rcar_gen3_memmap_fixup(void);
 #endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_ARCH_RMOBILE_H */

arch/arm/mach-rmobile/memmap-gen3.c

@@ -9,77 +9,24 @@
 #include <common.h>
 #include <asm/armv8/mmu.h>
 
-static struct mm_region r8a7795_mem_map[] = {
+static struct mm_region gen3_mem_map[] = {
 	{
 		.virt = 0x0UL,
 		.phys = 0x0UL,
-		.size = 0x80000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_INNER_SHARE
-	}, {
-		.virt = 0x80000000UL,
-		.phys = 0x80000000UL,
-		.size = 0x80000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-			 PTE_BLOCK_NON_SHARE |
-			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-	}, {
-		/* List terminator */
-		0,
-	}
-};
-
-static struct mm_region r8a7796_mem_map[] = {
-	{
-		.virt = 0x0UL,
-		.phys = 0x0UL,
-		.size = 0xe0000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_INNER_SHARE
-	}, {
-		.virt = 0xe0000000UL,
-		.phys = 0xe0000000UL,
-		.size = 0xe0000000UL,
+		.size = 0x40000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
-		/* List terminator */
-		0,
-	}
-};
-
-static struct mm_region r8a77970_mem_map[] = {
-	{
-		.virt = 0x0UL,
-		.phys = 0x0UL,
-		.size = 0xe0000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_INNER_SHARE
-	}, {
-		.virt = 0xe0000000UL,
-		.phys = 0xe0000000UL,
-		.size = 0xe0000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-			 PTE_BLOCK_NON_SHARE |
-			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-	}, {
-		/* List terminator */
-		0,
-	}
-};
-
-static struct mm_region r8a77995_mem_map[] = {
-	{
-		.virt = 0x0UL,
-		.phys = 0x0UL,
-		.size = 0xe0000000UL,
+		.virt = 0x40000000UL,
+		.phys = 0x40000000UL,
+		.size = 0x80000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_INNER_SHARE
 	}, {
-		.virt = 0xe0000000UL,
-		.phys = 0xe0000000UL,
-		.size = 0xe0000000UL,
+		.virt = 0xc0000000UL,
+		.phys = 0xc0000000UL,
+		.size = 0x40000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
@@ -89,25 +36,4 @@ static struct mm_region r8a77995_mem_map[] = {
 	}
 };
 
-struct mm_region *mem_map = r8a7795_mem_map;
-
-void rcar_gen3_memmap_fixup(void)
-{
-	u32 cpu_type = rmobile_get_cpu_type();
-
-	switch (cpu_type) {
-	case RMOBILE_CPU_TYPE_R8A7795:
-		mem_map = r8a7795_mem_map;
-		break;
-	case RMOBILE_CPU_TYPE_R8A7796:
-	case RMOBILE_CPU_TYPE_R8A77965:
-		mem_map = r8a7796_mem_map;
-		break;
-	case RMOBILE_CPU_TYPE_R8A77970:
-		mem_map = r8a77970_mem_map;
-		break;
-	case RMOBILE_CPU_TYPE_R8A77995:
-		mem_map = r8a77995_mem_map;
-		break;
-	}
-}
+struct mm_region *mem_map = gen3_mem_map;