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@@ -12,6 +12,8 @@
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#define CR3_OFFSET(x) (x ? 0x14 : 0x08)
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#define BRR_OFFSET(x) (x ? 0x08 : 0x0c)
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#define ISR_OFFSET(x) (x ? 0x00 : 0x1c)
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+
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+#define ICR_OFFSET 0x20
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/*
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* STM32F4 has one Data Register (DR) for received or transmitted
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* data, so map Receive Data Register (RDR) and Transmit Data
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@@ -23,28 +25,24 @@
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struct stm32_uart_info {
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u8 uart_enable_bit; /* UART_CR1_UE */
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bool stm32f4; /* true for STM32F4, false otherwise */
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- bool has_overrun_disable;
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bool has_fifo;
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};
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struct stm32_uart_info stm32f4_info = {
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.stm32f4 = true,
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.uart_enable_bit = 13,
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- .has_overrun_disable = false,
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.has_fifo = false,
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};
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struct stm32_uart_info stm32f7_info = {
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.uart_enable_bit = 0,
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.stm32f4 = false,
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- .has_overrun_disable = true,
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.has_fifo = false,
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};
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struct stm32_uart_info stm32h7_info = {
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.uart_enable_bit = 0,
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.stm32f4 = false,
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- .has_overrun_disable = true,
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.has_fifo = true,
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};
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@@ -62,6 +60,7 @@ struct stm32x7_serial_platdata {
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#define USART_CR3_OVRDIS BIT(12)
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+#define USART_SR_FLAG_ORE BIT(3)
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#define USART_SR_FLAG_RXNE BIT(5)
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#define USART_SR_FLAG_TXE BIT(7)
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@@ -69,4 +68,5 @@ struct stm32x7_serial_platdata {
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#define USART_BRR_M_SHIFT 4
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#define USART_BRR_M_MASK GENMASK(15, 4)
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+#define USART_ICR_OREF BIT(3)
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#endif
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