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@@ -275,6 +275,14 @@ static void watchdog_disable(void)
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;
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}
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+#ifdef CONFIG_SPL_BUILD
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+void board_init_f(ulong dummy)
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+{
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+ board_early_init_f();
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+ sdram_init();
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+}
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+#endif
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+
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void s_init(void)
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{
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/*
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@@ -290,6 +298,7 @@ void s_init(void)
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setup_clocks_for_console();
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uart_soft_reset();
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#if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT)
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+ /* TODO: This does not work, gd is not available yet */
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gd->baudrate = CONFIG_BAUDRATE;
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serial_init();
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gd->have_console = 1;
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@@ -298,9 +307,5 @@ void s_init(void)
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/* Enable RTC32K clock */
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rtc32k_enable();
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#endif
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-#ifdef CONFIG_SPL_BUILD
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- board_early_init_f();
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- sdram_init();
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-#endif
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}
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#endif
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