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@@ -169,6 +169,43 @@ void protect_secure_section(void)
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}
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#endif
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+#if defined(CONFIG_ARMV7_NONSEC)
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+static void smmu_flush(struct mc_ctlr *mc)
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+{
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+ (void)readl(&mc->mc_smmu_config);
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+}
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+
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+static void smmu_enable(void)
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+{
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+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
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+ u32 value;
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+
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+ /*
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+ * Enable translation for all clients since access to this register
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+ * is restricted to TrustZone-secured requestors. The kernel will use
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+ * the per-SWGROUP enable bits to enable or disable translations.
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+ */
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+ writel(0xffffffff, &mc->mc_smmu_translation_enable_0);
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+ writel(0xffffffff, &mc->mc_smmu_translation_enable_1);
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+ writel(0xffffffff, &mc->mc_smmu_translation_enable_2);
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+ writel(0xffffffff, &mc->mc_smmu_translation_enable_3);
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+
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+ /*
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+ * Enable SMMU globally since access to this register is restricted
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+ * to TrustZone-secured requestors.
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+ */
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+ value = readl(&mc->mc_smmu_config);
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+ value |= TEGRA_MC_SMMU_CONFIG_ENABLE;
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+ writel(value, &mc->mc_smmu_config);
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+
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+ smmu_flush(mc);
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+}
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+#else
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+static void smmu_enable(void)
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+{
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+}
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+#endif
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+
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void s_init(void)
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{
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/* Init PMC scratch memory */
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@@ -179,6 +216,9 @@ void s_init(void)
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/* init the cache */
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config_cache();
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+ /* enable SMMU */
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+ smmu_enable();
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+
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/* init vpr */
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config_vpr();
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}
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