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@@ -2932,7 +2932,6 @@ struct ccsr_pman {
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#endif
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#endif
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#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
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#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
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-#define CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC85xx_USB1_OFFSET
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#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
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#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
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#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
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#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
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#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
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#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
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@@ -2985,7 +2984,7 @@ struct ccsr_pman {
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#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
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#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
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#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
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#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
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#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
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#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
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-#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000
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+#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
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#ifdef CONFIG_TSECV2
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#ifdef CONFIG_TSECV2
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#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
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#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
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@@ -3086,8 +3085,10 @@ struct ccsr_pman {
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
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#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
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#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
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-#define CONFIG_SYS_MPC85xx_USB_ADDR \
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- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
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+#define CONFIG_SYS_MPC85xx_USB1_ADDR \
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+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
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+#define CONFIG_SYS_MPC85xx_USB2_ADDR \
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+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
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#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \
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#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \
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