net: phy: marvell: Fix style violations

Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>

drivers/net/phy/marvell.c

@@ -159,7 +159,7 @@ static int m88e1xxx_parse_status(struct phy_device *phydev)
 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS);
 
 	if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) &&
-		!(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
+	    !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
 		int i = 0;
 
 		puts("Waiting for PHY realtime link");
@@ -175,10 +175,10 @@ static int m88e1xxx_parse_status(struct phy_device *phydev)
 				putc('.');
 			udelay(1000);
 			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
-					MIIM_88E1xxx_PHY_STATUS);
+					   MIIM_88E1xxx_PHY_STATUS);
 		}
 		puts(" done\n");
-		udelay(500000);	/* another 500 ms (results in faster booting) */
+		mdelay(500);	/* another 500 ms (results in faster booting) */
 	} else {
 		if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK)
 			phydev->link = 1;
@@ -226,9 +226,9 @@ static int m88e1111s_config(struct phy_device *phydev)
 
 	if (phy_interface_is_rgmii(phydev)) {
 		reg = phy_read(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
+			       MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
 		if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
-			(phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
+		    (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
 			reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
 		} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 			reg &= ~MIIM_88E1111_TX_DELAY;
@@ -239,10 +239,10 @@ static int m88e1111s_config(struct phy_device *phydev)
 		}
 
 		phy_write(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
+			  MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
 
 		reg = phy_read(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
+			       MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
 
 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
 
@@ -252,47 +252,47 @@ static int m88e1111s_config(struct phy_device *phydev)
 			reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RGMII;
 
 		phy_write(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
+			  MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
 	}
 
 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 		reg = phy_read(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
+			       MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
 
 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
 		reg |= MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK;
 		reg |= MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
 
 		phy_write(phydev, MDIO_DEVAD_NONE,
-			MIIM_88E1111_PHY_EXT_SR, reg);
+			  MIIM_88E1111_PHY_EXT_SR, reg);
 	}
 
 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
 		reg = phy_read(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
+			       MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
 		reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
 		phy_write(phydev,
-			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
+			  MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
 
 		reg = phy_read(phydev, MDIO_DEVAD_NONE,
-			MIIM_88E1111_PHY_EXT_SR);
+			       MIIM_88E1111_PHY_EXT_SR);
 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
 			MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
 		reg |= 0x7 | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
 		phy_write(phydev, MDIO_DEVAD_NONE,
-			MIIM_88E1111_PHY_EXT_SR, reg);
+			  MIIM_88E1111_PHY_EXT_SR, reg);
 
 		/* soft reset */
 		phy_reset(phydev);
 
 		reg = phy_read(phydev, MDIO_DEVAD_NONE,
-			MIIM_88E1111_PHY_EXT_SR);
+			       MIIM_88E1111_PHY_EXT_SR);
 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
-			MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
+			 MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
 		reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RTBI |
 			MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
 		phy_write(phydev, MDIO_DEVAD_NONE,
-			MIIM_88E1111_PHY_EXT_SR, reg);
+			  MIIM_88E1111_PHY_EXT_SR, reg);
 	}
 
 	/* soft reset */
@@ -308,7 +308,7 @@ static int m88e1111s_config(struct phy_device *phydev)
  * m88e1518_phy_writebits - write bits to a register
  */
 void m88e1518_phy_writebits(struct phy_device *phydev,
-		   u8 reg_num, u16 offset, u16 len, u16 data)
+			    u8 reg_num, u16 offset, u16 len, u16 data)
 {
 	u16 reg, mask;
 
@@ -471,10 +471,10 @@ static int m88e1121_config(struct phy_device *phydev)
 	/* Switch the page to access the led register */
 	pg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE);
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE,
-			MIIM_88E1121_PHY_LED_PAGE);
+		  MIIM_88E1121_PHY_LED_PAGE);
 	/* Configure leds */
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_LED_CTRL,
-			MIIM_88E1121_PHY_LED_DEF);
+		  MIIM_88E1121_PHY_LED_DEF);
 	/* Restore the page pointer */
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE, pg);
 
@@ -497,7 +497,7 @@ static int m88e1145_config(struct phy_device *phydev)
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_CAL_OV, 0xa2da);
 
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_SCR,
-			MIIM_88E1xxx_PHY_MDI_X_AUTO);
+		  MIIM_88E1xxx_PHY_MDI_X_AUTO);
 
 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR);
 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
@@ -524,7 +524,7 @@ static int m88e1145_startup(struct phy_device *phydev)
 		return ret;
 
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_LED_CONTROL,
-			MIIM_88E1145_PHY_LED_DIRECT);
+		  MIIM_88E1145_PHY_LED_DIRECT);
 	return m88e1xxx_parse_status(phydev);
 }