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@@ -7,8 +7,6 @@
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#ifndef _ASM_ARCH_HARDWARE_H
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#define _ASM_ARCH_HARDWARE_H
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-#define ZYNQ_SERIAL_BASEADDR0 0xE0000000
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-#define ZYNQ_SERIAL_BASEADDR1 0xE0001000
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#define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000
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#define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000
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#define ZYNQ_SCU_BASEADDR 0xF8F00000
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