ARM: mvebu: Convert CONFIG_MVNETA to Kconfig

This converts the following to Kconfig:
   CONFIG_MVNETA

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>

arch/arm/mach-mvebu/include/mach/config.h

@@ -76,9 +76,6 @@
  */
 #ifdef CONFIG_CMD_NET
 #define CONFIG_MII		/* expose smi ove miiphy interface */
-#if !defined(CONFIG_ARMADA_375)
-#define CONFIG_MVNETA		/* Enable Marvell Gbe Controller Driver */
-#endif
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50

configs/clearfog_defconfig

@@ -35,8 +35,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000

configs/controlcenterdc_defconfig

@@ -46,8 +46,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_SCSI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000

configs/db-88f6820-amc_defconfig

@@ -47,8 +47,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=200000000

configs/db-88f6820-gp_defconfig

@@ -45,8 +45,8 @@ CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_SCSI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000

configs/db-mv784mp-gp_defconfig

@@ -44,8 +44,8 @@ CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000

configs/ds414_defconfig

@@ -38,8 +38,8 @@ CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000

configs/maxbcm_defconfig

@@ -32,8 +32,8 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2

configs/theadorable_debug_defconfig

@@ -51,8 +51,8 @@ CONFIG_DM_GPIO=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000

configs/turris_omnia_defconfig

@@ -33,8 +33,8 @@ CONFIG_MISC=y
 CONFIG_ATSHA204A=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
-CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2

drivers/net/Kconfig

@@ -159,6 +159,14 @@ config FTMAC100
 	help
 	  This MAC is present in Andestech SoCs.
 
+config MVNETA
+	bool "Marvell Armada 385 network interface support"
+	depends on ARMADA_XP || ARMADA_38X
+	select PHYLIB
+	help
+	  This driver supports the network interface units in the
+	  Marvell ARMADA XP and 38X SoCs
+
 config MVPP2
 	bool "Marvell Armada 375/7K/8K network interface support"
 	depends on ARMADA_375 || ARMADA_8K

include/configs/mvebu_armada-37xx.h

@@ -84,7 +84,6 @@
 /*
  * Ethernet Driver configuration
  */
-#define CONFIG_MVNETA		/* Enable Marvell Gbe Controller Driver */
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50

scripts/config_whitelist.txt

@@ -1497,7 +1497,6 @@ CONFIG_MVEBU_MMC
 CONFIG_MVGBE
 CONFIG_MVGBE_PORTS
 CONFIG_MVMFP_V2
-CONFIG_MVNETA
 CONFIG_MVS
 CONFIG_MVSATA_IDE
 CONFIG_MVSATA_IDE_USE_PORT0