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@@ -13,6 +13,23 @@
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DECLARE_GLOBAL_DATA_PTR;
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+#if defined(CONFIG_VID) && (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
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+static void fsl_ddr_setup_0v9_volt(memctl_options_t *popts)
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+{
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+ int vdd;
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+
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+ vdd = get_core_volt_from_fuse();
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+ /* Nothing to do for silicons doesn't support VID */
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+ if (vdd < 0)
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+ return;
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+
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+ if (vdd == 900) {
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+ popts->ddr_cdr1 |= DDR_CDR1_V0PT9_EN;
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+ debug("VID: configure DDR to support 900 mV\n");
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+ }
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+}
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+#endif
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+
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void fsl_ddr_board_options(memctl_options_t *popts,
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dimm_params_t *pdimm,
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unsigned int ctrl_num)
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@@ -87,6 +104,10 @@ found:
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popts->addr_hash = 1;
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_60ohm);
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+#if defined(CONFIG_VID) && (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
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+ fsl_ddr_setup_0v9_volt(popts);
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+#endif
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+
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_60ohm) |
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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}
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