armv8: cavium: Add ThunderX 88xx board definition

This commit adds basic Cavium ThunderX 88xx board definitions and support.

Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
[trini: Drop CONFIG_SYS_GENERIC_BOARD define]
Signed-off-by: Tom Rini <trini@konsulko.com>

arch/arm/Kconfig

@@ -716,6 +716,10 @@ config ARCH_ROCKCHIP
 	select CPU_V7
 	select DM
 
+config TARGET_THUNDERX_88XX
+	bool "Support ThunderX 88xx"
+	select OF_CONTROL
+
 endchoice
 
 source "arch/arm/mach-at91/Kconfig"
@@ -784,6 +788,7 @@ source "board/bluegiga/apx4devkit/Kconfig"
 source "board/broadcom/bcm28155_ap/Kconfig"
 source "board/broadcom/bcmcygnus/Kconfig"
 source "board/broadcom/bcmnsp/Kconfig"
+source "board/cavium/thunderx/Kconfig"
 source "board/cirrus/edb93xx/Kconfig"
 source "board/compulab/cm_t335/Kconfig"
 source "board/compulab/cm_t43/Kconfig"

arch/arm/dts/thunderx-88xx.dtsi

@@ -348,7 +348,7 @@
 			interrupts = <1 21 4>;
 			clocks = <&refclk50mhz>;
 			clock-names = "apb_pclk";
-			flags = <1>;
+			uboot,skip-init;
 		};
 
 		uaa1: serial@87e0,25000000 {
@@ -357,7 +357,7 @@
 			interrupts = <1 22 4>;
 			clocks = <&refclk50mhz>;
 			clock-names = "apb_pclk";
-			flags = <1>;
+			uboot,skip-init;
 		};
 	};
 };

board/cavium/thunderx/Kconfig

@@ -0,0 +1,27 @@
+if TARGET_THUNDERX_88XX
+
+config SYS_CPU
+	string
+	default "armv8"
+
+config SYS_BOARD
+	string
+	default "thunderx"
+
+config SYS_VENDOR
+	string
+	default "cavium"
+
+config SYS_CONFIG_NAME
+	string
+	default "thunderx_88xx"
+
+config CMD_ATF
+	bool "Enable ATF query commands"
+	default y
+	help
+	  Enable vendor specific ATF query commands such as SPI and SD/MMC
+	  devices access, low level environment query, boot device layout
+	  and node count.
+
+endif

board/cavium/thunderx/MAINTAINERS

@@ -0,0 +1,6 @@
+THUNDERX BOARD
+M:	Sergey Temerkhanov <s.temerkhanov@gmail.com>
+S:	Maintained
+F:	board/cavium/thunderx/
+F:	include/configs/thunderx_88xx.h
+F:	configs/thunderx_88xx_defconfig

board/cavium/thunderx/Makefile

@@ -0,0 +1,8 @@
+#
+#
+# (C) Copyright 2014, Cavium Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= thunderx.o

board/cavium/thunderx/thunderx.c

@@ -0,0 +1,75 @@
+/**
+ * (C) Copyright 2014, Cavium Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+**/
+
+#include <common.h>
+#include <malloc.h>
+#include <errno.h>
+#include <linux/compiler.h>
+
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
+#include <dm/platdata.h>
+#include <dm/platform_data/serial_pl01x.h>
+
+static const struct pl01x_serial_platdata serial0 = {
+	.base = CONFIG_SYS_SERIAL0,
+	.type = TYPE_PL011,
+	.clock = 0,
+	.skip_init = true,
+};
+
+U_BOOT_DEVICE(thunderx_serial0) = {
+	.name = "serial_pl01x",
+	.platdata = &serial0,
+};
+
+static const struct pl01x_serial_platdata serial1 = {
+	.base = CONFIG_SYS_SERIAL1,
+	.type = TYPE_PL011,
+	.clock = 0,
+	.skip_init = true,
+};
+
+U_BOOT_DEVICE(thunderx_serial1) = {
+	.name = "serial_pl01x",
+	.platdata = &serial1,
+};
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int timer_init(void)
+{
+	return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+
+	return rc;
+}
+
+#ifdef CONFIG_PCI
+void pci_init_board(void)
+{
+	printf("DEBUG: PCI Init TODO *****\n");
+}
+#endif

configs/thunderx_88xx_defconfig

@@ -0,0 +1,24 @@
+CONFIG_ARM=y
+CONFIG_TARGET_THUNDERX_88XX=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
+CONFIG_SYS_EXTRA_OPTIONS="ARM64"
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="ThunderX_88XX> "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_DM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_BASE=0x87e024000000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_REGEX=y

include/configs/thunderx_88xx.h

@@ -0,0 +1,143 @@
+/**
+ * (C) Copyright 2014, Cavium Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+**/
+
+#ifndef __THUNDERX_88XX_H__
+#define __THUNDERX_88XX_H__
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_THUNDERX
+
+#define CONFIG_SYS_64BIT
+
+#define CONFIG_SYS_NO_FLASH
+
+
+#define CONFIG_IDENT_STRING	\
+	" for Cavium Thunder CN88XX ARM v8 Multi-Core"
+#define CONFIG_BOOTP_VCI_STRING		"Diagnostics"
+
+#define MEM_BASE			0x00500000
+
+#define CONFIG_COREID_MASK             0xffffff
+
+#define CONFIG_SYS_FULL_VA
+
+#define CONFIG_SYS_MEM_MAP		{{0x000000000000UL, 0x40000000000UL, \
+					  PTL2_MEMTYPE(MT_NORMAL) |	     \
+					  PTL2_BLOCK_NON_SHARE},	     \
+					 {0x800000000000UL, 0x40000000000UL, \
+					  PTL2_MEMTYPE(MT_DEVICE_NGNRNE) |   \
+					  PTL2_BLOCK_NON_SHARE},	     \
+					 {0x840000000000UL, 0x40000000000UL, \
+					  PTL2_MEMTYPE(MT_DEVICE_NGNRNE) |   \
+					  PTL2_BLOCK_NON_SHARE},	     \
+					}
+
+#define CONFIG_SYS_MEM_MAP_SIZE		3
+
+#define CONFIG_SYS_VA_BITS		48
+#define CONFIG_SYS_PTL2_BITS		42
+#define CONFIG_SYS_BLOCK_SHIFT		29
+#define CONFIG_SYS_PTL1_ENTRIES		64
+#define CONFIG_SYS_PTL2_ENTRIES		8192
+
+#define CONFIG_SYS_PGTABLE_SIZE		\
+	((CONFIG_SYS_PTL1_ENTRIES + \
+	  CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8)
+#define CONFIG_SYS_TCR_EL1_IPS_BITS	(5UL << 32)
+#define CONFIG_SYS_TCR_EL2_IPS_BITS	(5 << 16)
+#define CONFIG_SYS_TCR_EL3_IPS_BITS	(5 << 16)
+
+/* Link Definitions */
+#define CONFIG_SYS_TEXT_BASE		0x00500000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+/* Flat Device Tree Definitions */
+#define CONFIG_OF_LIBFDT
+
+/* SMP Spin Table Definitions */
+#define CPU_RELEASE_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+
+/* Generic Timer Definitions */
+#define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
+
+
+#define CONFIG_SYS_MEMTEST_START	MEM_BASE
+#define CONFIG_SYS_MEMTEST_END		(MEM_BASE + PHYS_SDRAM_1_SIZE)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
+
+/* PL011 Serial Configuration */
+
+#define CONFIG_PL01X_SERIAL
+#define CONFIG_PL011_CLOCK		24000000
+#define CONFIG_CONS_INDEX		1
+
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE			(0x801000000000)
+#define GICR_BASE			(0x801000002000)
+#define CONFIG_SYS_SERIAL0		0x87e024000000
+#define CONFIG_SYS_SERIAL1		0x87e025000000
+
+#define CONFIG_BAUDRATE			115200
+
+/* Command line configuration */
+#define CONFIG_MENU
+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_PXE
+#define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LOAD_ADDR		(MEM_BASE)
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM_1			(MEM_BASE)	  /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE		(0x80000000-MEM_BASE)	/* 2048 MB */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+
+/* Initial environment variables */
+#define UBOOT_IMG_HEAD_SIZE		0x40
+/* C80000 - 0x40 */
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+					"kernel_addr=08007ffc0\0"	\
+					"fdt_addr=0x94C00000\0"		\
+					"fdt_high=0x9fffffff\0"
+
+#define CONFIG_BOOTARGS			\
+					"console=ttyAMA0,115200n8 " \
+					"earlycon=pl011,0x87e024000000 " \
+					"debug maxcpus=48 rootwait rw "\
+					"root=/dev/sda2 coherent_pool=16M"
+#define CONFIG_BOOTDELAY		5
+
+/* Do not preserve environment */
+#define CONFIG_ENV_IS_NOWHERE		1
+#define CONFIG_ENV_SIZE			0x1000
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_SYS_MAXARGS		64		/* max command args */
+#define CONFIG_NO_RELOCATION		1
+#define CONFIG_LIB_RAND
+#define PLL_REF_CLK			50000000	/* 50 MHz */
+#define NS_PER_REF_CLK_TICK		(1000000000/PLL_REF_CLK)
+
+#endif /* __THUNDERX_88XX_H__ */