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@@ -1,25 +0,0 @@
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-/*
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- * (C) Copyright 2008
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- * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
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- * This work has been supported by: QTechnology http://qtec.com/
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- * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
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- * SPDX-License-Identifier: GPL-2.0+
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-*/
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-#ifndef XILINX_IRQ_H
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-#define XILINX_IRQ_H
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-
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-#define intc XPAR_INTC_0_BASEADDR
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-#define ISR (intc + (0 * 4)) /* Interrupt Status Register */
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-#define IPR (intc + (1 * 4)) /* Interrupt Pending Register */
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-#define IER (intc + (2 * 4)) /* Interrupt Enable Register */
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-#define IAR (intc + (3 * 4)) /* Interrupt Acknowledge Register */
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-#define SIE (intc + (4 * 4)) /* Set Interrupt Enable bits */
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-#define CIE (intc + (5 * 4)) /* Clear Interrupt Enable bits */
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-#define IVR (intc + (6 * 4)) /* Interrupt Vector Register */
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-#define MER (intc + (7 * 4)) /* Master Enable Register */
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-
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-#define IRQ_MASK(irq) (1 << (irq & 0x1f))
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-
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-#define IRQ_MAX XPAR_INTC_MAX_NUM_INTR_INPUTS
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-
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-#endif
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