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@@ -116,4 +116,16 @@ struct watchdog {
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#define CPSW_BASE 0x48484000
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#define CPSW_BASE 0x48484000
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#define CPSW_MDIO_BASE 0x48485000
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#define CPSW_MDIO_BASE 0x48485000
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+/* gmii_sel register defines */
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+#define GMII1_SEL_MII 0x0
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+#define GMII1_SEL_RMII 0x1
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+#define GMII1_SEL_RGMII 0x2
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+#define GMII2_SEL_MII (GMII1_SEL_MII << 4)
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+#define GMII2_SEL_RMII (GMII1_SEL_RMII << 4)
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+#define GMII2_SEL_RGMII (GMII1_SEL_RGMII << 4)
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+
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+#define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII)
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+#define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)
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+#define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII)
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+
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#endif /* _CPU_H */
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#endif /* _CPU_H */
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