armv8: fsl-layerscape: add missing qe base address define

Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>

arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h

@@ -85,6 +85,8 @@
 #define GPIO3_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1320000)
 #define GPIO4_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1330000)
 
+#define QE_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1400000)
+
 #define LPUART_BASE				(CONFIG_SYS_IMMR + 0x01950000)
 
 #define EDMA_BASE_ADDR				(CONFIG_SYS_IMMR + 0x01c00000)