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@@ -1,62 +0,0 @@
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-/*
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- * (C) Copyright Rockchip Electronics Co., Ltd
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- *
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- * SPDX-License-Identifier: GPL-2.0
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- */
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-
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-#include <common.h>
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-#include <dm.h>
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-#include <errno.h>
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-#include <sysreset.h>
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-#include <asm/io.h>
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-#include <asm/arch/clock.h>
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-#include <asm/arch/cru_rk3368.h>
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-#include <asm/arch/hardware.h>
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-#include <linux/err.h>
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-
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-static void rk3368_pll_enter_slow_mode(struct rk3368_cru *cru)
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-{
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- struct rk3368_pll *pll;
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- int i;
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-
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- for (i = 0; i < 6; i++) {
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- pll = &cru->pll[i];
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- rk_clrreg(&pll->con3, PLL_MODE_MASK);
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- }
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-}
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-
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-static int rk3368_sysreset_request(struct udevice *dev, enum sysreset_t type)
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-{
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- struct rk3368_cru *cru = rockchip_get_cru();
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-
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- if (IS_ERR(cru))
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- return PTR_ERR(cru);
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- switch (type) {
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- case SYSRESET_WARM:
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- rk3368_pll_enter_slow_mode(cru);
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- rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
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- PMU_RST_BY_SND_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
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- writel(0xeca8, &cru->glb_srst_snd_val);
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- break;
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- case SYSRESET_COLD:
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- rk3368_pll_enter_slow_mode(cru);
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- rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
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- PMU_RST_BY_FST_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
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- writel(0xfdb9, &cru->glb_srst_fst_val);
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- break;
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- default:
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- return -EPROTONOSUPPORT;
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- }
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-
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- return -EINPROGRESS;
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-}
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-
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-static struct sysreset_ops rk3368_sysreset = {
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- .request = rk3368_sysreset_request,
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-};
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-
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-U_BOOT_DRIVER(sysreset_rk3368) = {
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- .name = "rk3368_sysreset",
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- .id = UCLASS_SYSRESET,
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- .ops = &rk3368_sysreset,
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-};
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