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@@ -210,6 +210,17 @@ int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
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return pci_bus_write_config(bus, bdf, offset, value, size);
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}
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+int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
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+ enum pci_size_t size)
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+{
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+ struct udevice *bus;
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+
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+ for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
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+ bus = bus->parent;
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+ return pci_bus_write_config(bus, pci_get_bdf(dev), offset, value, size);
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+}
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+
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+
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int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
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{
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return pci_write_config(bdf, offset, value, PCI_SIZE_32);
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@@ -225,6 +236,21 @@ int pci_write_config8(pci_dev_t bdf, int offset, u8 value)
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return pci_write_config(bdf, offset, value, PCI_SIZE_8);
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}
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+int dm_pci_write_config8(struct udevice *dev, int offset, u8 value)
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+{
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+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_8);
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+}
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+
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+int dm_pci_write_config16(struct udevice *dev, int offset, u16 value)
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+{
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+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_16);
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+}
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+
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+int dm_pci_write_config32(struct udevice *dev, int offset, u32 value)
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+{
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+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_32);
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+}
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+
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int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
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unsigned long *valuep, enum pci_size_t size)
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{
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@@ -249,6 +275,17 @@ int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
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return pci_bus_read_config(bus, bdf, offset, valuep, size);
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}
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+int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,
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+ enum pci_size_t size)
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+{
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+ struct udevice *bus;
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+
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+ for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
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+ bus = bus->parent;
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+ return pci_bus_read_config(bus, pci_get_bdf(dev), offset, valuep,
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+ size);
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+}
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+
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int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
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{
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unsigned long value;
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@@ -288,6 +325,45 @@ int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)
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return 0;
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}
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+int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep)
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+{
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+ unsigned long value;
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+ int ret;
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+
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+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_8);
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+ if (ret)
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+ return ret;
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+ *valuep = value;
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+
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+ return 0;
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+}
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+
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+int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep)
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+{
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+ unsigned long value;
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+ int ret;
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+
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+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_16);
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+ if (ret)
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+ return ret;
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+ *valuep = value;
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+
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+ return 0;
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+}
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+
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+int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
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+{
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+ unsigned long value;
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+ int ret;
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+
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+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_32);
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+ if (ret)
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+ return ret;
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+ *valuep = value;
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+
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+ return 0;
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+}
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+
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int pci_auto_config_devices(struct udevice *bus)
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{
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struct pci_controller *hose = bus->uclass_priv;
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