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@@ -815,7 +815,6 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
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ofnode node)
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{
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int pci_addr_cells, addr_cells, size_cells;
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- phys_addr_t base = 0, size;
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int cells_per_record;
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const u32 *prop;
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int len;
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@@ -874,6 +873,21 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
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}
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/* Add a region for our local memory */
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+#ifdef CONFIG_NR_DRAM_BANKS
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+ bd_t *bd = gd->bd;
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+
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+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
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+ if (bd->bi_dram[i].size) {
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+ pci_set_region(hose->regions + hose->region_count++,
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+ bd->bi_dram[i].start,
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+ bd->bi_dram[i].start,
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+ bd->bi_dram[i].size,
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+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
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+ }
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+ }
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+#else
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+ phys_addr_t base = 0, size;
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+
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size = gd->ram_size;
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#ifdef CONFIG_SYS_SDRAM_BASE
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base = CONFIG_SYS_SDRAM_BASE;
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@@ -882,6 +896,7 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
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size = gd->pci_ram_top - base;
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pci_set_region(hose->regions + hose->region_count++, base, base,
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size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
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+#endif
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return 0;
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}
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