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@@ -99,10 +99,54 @@ int print_cpuinfo(void)
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}
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#endif
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+#ifdef CONFIG_MACH_SUN8I_H3
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+
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+#define SIDC_PRCTL 0x40
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+#define SIDC_RDKEY 0x60
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+
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+#define SIDC_OP_LOCK 0xAC
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+
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+uint32_t sun8i_efuse_read(uint32_t offset)
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+{
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+ uint32_t reg_val;
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+
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+ reg_val = readl(SUNXI_SIDC_BASE + SIDC_PRCTL);
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+ reg_val &= ~(((0x1ff) << 16) | 0x3);
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+ reg_val |= (offset << 16);
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+ writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
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+
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+ reg_val &= ~(((0xff) << 8) | 0x3);
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+ reg_val |= (SIDC_OP_LOCK << 8) | 0x2;
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+ writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
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+
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+ while (readl(SUNXI_SIDC_BASE + SIDC_PRCTL) & 0x2);
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+
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+ reg_val &= ~(((0x1ff) << 16) | ((0xff) << 8) | 0x3);
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+ writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
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+
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+ reg_val = readl(SUNXI_SIDC_BASE + SIDC_RDKEY);
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+ return reg_val;
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+}
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+#endif
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+
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int sunxi_get_sid(unsigned int *sid)
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{
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#ifdef CONFIG_AXP221_POWER
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return axp_get_sid(sid);
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+#elif defined CONFIG_MACH_SUN8I_H3
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+ /*
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+ * H3 SID controller has a bug, which makes the initial value of
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+ * SUNXI_SID_BASE at boot wrong.
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+ * Read the value directly from SID controller, in order to get
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+ * the correct value, and also refresh the wrong value at
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+ * SUNXI_SID_BASE.
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+ */
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+ int i;
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+
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+ for (i = 0; i< 4; i++)
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+ sid[i] = sun8i_efuse_read(i * 4);
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+
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+ return 0;
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#elif defined SUNXI_SID_BASE
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int i;
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