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@@ -4980,8 +4980,8 @@ e1000_configure_tx(struct e1000_hw *hw)
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unsigned long tipg, tarc;
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uint32_t ipgr1, ipgr2;
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- E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base);
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- E1000_WRITE_REG(hw, TDBAH, 0);
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+ E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base & 0xffffffff);
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+ E1000_WRITE_REG(hw, TDBAH, (unsigned long)tx_base >> 32);
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E1000_WRITE_REG(hw, TDLEN, 128);
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@@ -5124,8 +5124,8 @@ e1000_configure_rx(struct e1000_hw *hw)
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E1000_WRITE_FLUSH(hw);
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}
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/* Setup the Base and Length of the Rx Descriptor Ring */
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- E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base);
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- E1000_WRITE_REG(hw, RDBAH, 0);
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+ E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base & 0xffffffff);
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+ E1000_WRITE_REG(hw, RDBAH, (unsigned long)rx_base >> 32);
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E1000_WRITE_REG(hw, RDLEN, 128);
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