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powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig

Use Kconfig to select errata workaround.

Signed-off-by: York Sun <york.sun@nxp.com>
York Sun 8 年之前
父節點
c01e4a1a6f
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63659ff317
共有 7 個文件被更改，包括 334 次插入 和 212 次删除
分割檢視 顯示文件統計
  1. 317 0
      arch/powerpc/cpu/mpc85xx/Kconfig
  2. 1 1
      arch/powerpc/cpu/mpc85xx/cmd_errata.c
  3. 1 1
      arch/powerpc/cpu/mpc85xx/cpu_init.c
  4. 0 157
      arch/powerpc/include/asm/config_mpc85xx.h
  5. 15 0
      drivers/ddr/fsl/Kconfig
  6. 0 1
      include/configs/BSC9132QDS.h
  7. 0 52
      scripts/config_whitelist.txt

+ 317 - 0
arch/powerpc/cpu/mpc85xx/Kconfig
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@@ -331,6 +331,16 @@ config ARCH_B4420
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A005871
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006384
 
+	select SYS_FSL_ERRATUM_A006475
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007075
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007212
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -340,6 +350,16 @@ config ARCH_B4860
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A005871
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006384
 
+	select SYS_FSL_ERRATUM_A006475
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007075
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007212
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -348,6 +368,8 @@ config ARCH_B4860
 
 config ARCH_BSC9131
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -357,7 +379,12 @@ config ARCH_BSC9131
 
 config ARCH_BSC9132
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_A005434
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_IFC_A002769
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -367,6 +394,7 @@ config ARCH_BSC9132
 
 config ARCH_C29X
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -377,6 +405,8 @@ config ARCH_C29X
 
 config ARCH_MPC8536
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_HAS_DDR2
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -400,6 +430,7 @@ config ARCH_MPC8541
 
 config ARCH_MPC8544
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_HAS_DDR2
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -409,6 +440,11 @@ config ARCH_MPC8544
 
 config ARCH_MPC8548
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_NMG_DDR120
 
+	select SYS_FSL_ERRATUM_NMG_LBC103
 
+	select SYS_FSL_ERRATUM_NMG_ETSEC129
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
 	select SYS_FSL_HAS_DDR2
 
 	select SYS_FSL_HAS_DDR1
 
 	select SYS_FSL_HAS_SEC
 
@@ -440,6 +476,8 @@ config ARCH_MPC8568
 
 config ARCH_MPC8569
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -448,6 +486,10 @@ config ARCH_MPC8569
 
 config ARCH_MPC8572
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_DDR_115
 
+	select SYS_FSL_ERRATUM_DDR111_DDR134
 
 	select SYS_FSL_HAS_DDR2
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -458,7 +500,17 @@ config ARCH_MPC8572
 
 config ARCH_P1010
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_A007075
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_IFC_A002769
 
+	select SYS_FSL_ERRATUM_P1010_A003549
 
+	select SYS_FSL_ERRATUM_SEC_A003571
 
+	select SYS_FSL_ERRATUM_IFC_A003399
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -468,6 +520,9 @@ config ARCH_P1010
 
 config ARCH_P1011
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -478,6 +533,9 @@ config ARCH_P1011
 
 config ARCH_P1020
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -488,6 +546,9 @@ config ARCH_P1020
 
 config ARCH_P1021
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -498,7 +559,12 @@ config ARCH_P1021
 
 config ARCH_P1022
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_SATA_A001
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -508,6 +574,9 @@ config ARCH_P1022
 
 config ARCH_P1023
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -516,6 +585,9 @@ config ARCH_P1023
 
 config ARCH_P1024
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -526,6 +598,9 @@ config ARCH_P1024
 
 config ARCH_P1025
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -536,6 +611,9 @@ config ARCH_P1025
 
 config ARCH_P2020
 
 	bool
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004477
 
+	select SYS_FSL_ERRATUM_A004508
 
+	select SYS_FSL_ERRATUM_A005125
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_ERRATUM_ESDHC_A001
 
 	select SYS_FSL_HAS_DDR3
 
@@ -548,7 +626,17 @@ config ARCH_P2041
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004510
 
+	select SYS_FSL_ERRATUM_A004849
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_CPU_A003999
 
+	select SYS_FSL_ERRATUM_DDR_A003
 
+	select SYS_FSL_ERRATUM_DDR_A003474
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_NMG_CPU_A011
 
+	select SYS_FSL_ERRATUM_SRIO_A004034
 
+	select SYS_FSL_ERRATUM_USB14
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -558,7 +646,18 @@ config ARCH_P3041
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004510
 
+	select SYS_FSL_ERRATUM_A004849
 
+	select SYS_FSL_ERRATUM_A005812
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_CPU_A003999
 
+	select SYS_FSL_ERRATUM_DDR_A003
 
+	select SYS_FSL_ERRATUM_DDR_A003474
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_NMG_CPU_A011
 
+	select SYS_FSL_ERRATUM_SRIO_A004034
 
+	select SYS_FSL_ERRATUM_USB14
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -568,9 +667,29 @@ config ARCH_P4080
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004510
 
+	select SYS_FSL_ERRATUM_A004580
 
+	select SYS_FSL_ERRATUM_A004849
 
+	select SYS_FSL_ERRATUM_A005812
 
+	select SYS_FSL_ERRATUM_A007075
 
+	select SYS_FSL_ERRATUM_CPC_A002
 
+	select SYS_FSL_ERRATUM_CPC_A003
 
+	select SYS_FSL_ERRATUM_CPU_A003999
 
+	select SYS_FSL_ERRATUM_DDR_A003
 
+	select SYS_FSL_ERRATUM_DDR_A003474
 
+	select SYS_FSL_ERRATUM_ELBC_A001
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_ERRATUM_ESDHC13
 
 	select SYS_FSL_ERRATUM_ESDHC135
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_NMG_CPU_A011
 
+	select SYS_FSL_ERRATUM_SRIO_A004034
 
+	select SYS_P4080_ERRATUM_CPU22
 
+	select SYS_P4080_ERRATUM_PCIE_A003
 
+	select SYS_P4080_ERRATUM_SERDES8
 
+	select SYS_P4080_ERRATUM_SERDES9
 
+	select SYS_P4080_ERRATUM_SERDES_A001
 
+	select SYS_P4080_ERRATUM_SERDES_A005
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -580,7 +699,14 @@ config ARCH_P5020
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004510
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_DDR_A003
 
+	select SYS_FSL_ERRATUM_DDR_A003474
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_I2C_A004447
 
+	select SYS_FSL_ERRATUM_SRIO_A004034
 
+	select SYS_FSL_ERRATUM_USB14
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -590,7 +716,14 @@ config ARCH_P5040
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004510
 
+	select SYS_FSL_ERRATUM_A004699
 
+	select SYS_FSL_ERRATUM_A005812
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_DDR_A003
 
+	select SYS_FSL_ERRATUM_DDR_A003474
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
+	select SYS_FSL_ERRATUM_USB14
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -603,6 +736,9 @@ config ARCH_T1023
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A008378
 
+	select SYS_FSL_ERRATUM_A009663
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_DDR4
 
@@ -614,6 +750,9 @@ config ARCH_T1024
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A008378
 
+	select SYS_FSL_ERRATUM_A009663
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_DDR4
 
@@ -625,6 +764,10 @@ config ARCH_T1040
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A008044
 
+	select SYS_FSL_ERRATUM_A008378
 
+	select SYS_FSL_ERRATUM_A009663
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_DDR4
 
@@ -636,6 +779,10 @@ config ARCH_T1042
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A008044
 
+	select SYS_FSL_ERRATUM_A008378
 
+	select SYS_FSL_ERRATUM_A009663
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_DDR4
 
@@ -647,6 +794,11 @@ config ARCH_T2080
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007212
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -657,6 +809,11 @@ config ARCH_T2081
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007212
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_ERRATUM_ESDHC111
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
@@ -667,6 +824,13 @@ config ARCH_T4160
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004468
 
+	select SYS_FSL_ERRATUM_A005871
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007798
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -676,6 +840,14 @@ config ARCH_T4240
 
 	bool
 
 	select E500MC
 
 	select FSL_LAW
 
+	select SYS_FSL_ERRATUM_A004468
 
+	select SYS_FSL_ERRATUM_A005871
 
+	select SYS_FSL_ERRATUM_A006261
 
+	select SYS_FSL_ERRATUM_A006379
 
+	select SYS_FSL_ERRATUM_A006593
 
+	select SYS_FSL_ERRATUM_A007186
 
+	select SYS_FSL_ERRATUM_A007798
 
+	select SYS_FSL_ERRATUM_A009942
 
 	select SYS_FSL_HAS_DDR3
 
 	select SYS_FSL_HAS_SEC
 
 	select SYS_FSL_SEC_BE
 
@@ -787,6 +959,151 @@ config SYS_CCSRBAR_DEFAULT
 
 		if changed by pre-boot regime. The value here must match
 
 		the current value in SoC. If not sure, do not change.
 
 
+config SYS_FSL_ERRATUM_A004468
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004477
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004508
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004580
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004699
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004849
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004510
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A004510_SVR_REV
 
+	hex
 
+	depends on SYS_FSL_ERRATUM_A004510
 
+	default 0x20 if ARCH_P4080
 
+	default 0x10
 
+
 
+config SYS_FSL_ERRATUM_A004510_SVR_REV2
 
+	hex
 
+	depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
 
+	default 0x11
 
+
 
+config SYS_FSL_ERRATUM_A005125
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A005434
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A005812
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A005871
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A006261
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A006379
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A006384
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A006475
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A006593
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A007075
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A007186
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A007212
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A007798
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_A008044
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_CPC_A002
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_CPC_A003
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_CPU_A003999
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_ELBC_A001
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_I2C_A004447
 
+	bool
 
+
 
+config SYS_FSL_A004447_SVR_REV
 
+	hex
 
+	depends on SYS_FSL_ERRATUM_I2C_A004447
 
+	default 0x00 if ARCH_MPC8548
 
+	default 0x10 if ARCH_P1010
 
+	default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
 
+	default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
 
+
 
+config SYS_FSL_ERRATUM_IFC_A002769
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_IFC_A003399
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_NMG_CPU_A011
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_NMG_ETSEC129
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_NMG_LBC103
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_P1010_A003549
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_SATA_A001
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_SEC_A003571
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_SRIO_A004034
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_USB14
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_CPU22
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_PCIE_A003
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_SERDES8
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_SERDES9
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_SERDES_A001
 
+	bool
 
+
 
+config SYS_P4080_ERRATUM_SERDES_A005
 
+	bool
 
+
 
 config SYS_FSL_NUM_LAWS
 
 	int "Number of local access windows"
 
 	depends on FSL_LAW

+ 1 - 1
arch/powerpc/cpu/mpc85xx/cmd_errata.c
查看文件 

@@ -136,7 +136,7 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 #endif
 
 	__maybe_unused u32 svr = get_svr();
 
 
-#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
 
+#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_SYS_FSL_ERRATUM_SATA_A001)
 
 	if (IS_SVR_REV(svr, 1, 0)) {
 
 		switch (SVR_SOC_VER(svr)) {
 
 		case SVR_P1013:

+ 1 - 1
arch/powerpc/cpu/mpc85xx/cpu_init.c
查看文件 

@@ -975,7 +975,7 @@ int cpu_init_r(void)
 
 #endif
 
 #endif
 
 
-#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
 
+#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_SYS_FSL_ERRATUM_SATA_A001)
 
 	/*
 
 	 * For P1022/1013 Rev1.0 silicon, after power on SATA host
 
 	 * controller is configured in legacy mode instead of the

+ 0 - 157
arch/powerpc/include/asm/config_mpc85xx.h
查看文件 

@@ -23,28 +23,19 @@
 
 #define CONFIG_SYS_FSL_SEC_MON_BE
 
 
 #if defined(CONFIG_ARCH_MPC8536)
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_MPC8540)
 
 
 #elif defined(CONFIG_ARCH_MPC8541)
 
 
 #elif defined(CONFIG_ARCH_MPC8544)
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_MPC8548)
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	1
 
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
 #define CONFIG_SYS_FSL_RMU
 
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x00
 
 
 #elif defined(CONFIG_ARCH_MPC8555)
 
 
@@ -69,14 +60,8 @@
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
 #define CONFIG_SYS_FSL_RMU
 
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_MPC8572)
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_115
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_P1010)
 
 #define CONFIG_FSL_SDHC_V2_3
 
@@ -86,18 +71,7 @@
 
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	4
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
 
-#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
 
-#define CONFIG_SYS_FSL_ERRATUM_SEC_A003571
 
-#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A007075
 
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x10
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 
 /* P1011 is single core version of P1020 */
 
@@ -105,16 +79,10 @@
 
 #define CONFIG_TSECV2
 
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_P1020)
 
 #define CONFIG_TSECV2
 
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 
 #endif
 
@@ -122,22 +90,14 @@
 
 #elif defined(CONFIG_ARCH_P1021)
 
 #define CONFIG_TSECV2
 
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
 #define QE_MURAM_SIZE			0x6000UL
 
 #define MAX_QE_RISC			1
 
 #define QE_NUM_OF_SNUM			28
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
 
 
 #elif defined(CONFIG_ARCH_P1022)
 
 #define CONFIG_TSECV2
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-#define CONFIG_FSL_SATA_ERRATUM_A001
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
 
 #elif defined(CONFIG_ARCH_P1023)
 
 #define CONFIG_SYS_NUM_FMAN		1
 
@@ -148,31 +108,21 @@
 
 #define CONFIG_SYS_BMAN_NUM_PORTALS	3
 
 #define CONFIG_SYS_FM_MURAM_SIZE	0x10000
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
 
 
 /* P1024 is lower end variant of P1020 */
 
 #elif defined(CONFIG_ARCH_P1024)
 
 #define CONFIG_TSECV2
 
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 /* P1025 is lower end variant of P1021 */
 
 #elif defined(CONFIG_ARCH_P1025)
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
 
 #define CONFIG_TSECV2
 
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
 #define QE_MURAM_SIZE			0x6000UL
 
 #define MAX_QE_RISC			1
 
 #define QE_NUM_OF_SNUM			28
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 
 #elif defined(CONFIG_ARCH_P2020)
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 
@@ -180,9 +130,6 @@
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
 #define CONFIG_SYS_FSL_RMU
 
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
-#define CONFIG_SYS_FSL_ERRATUM_A004508
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
 
 
 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
 
@@ -200,23 +147,10 @@
 
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 
-#define CONFIG_SYS_FSL_ERRATUM_USB14
 
-#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2	0x11
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
-#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
-#define CONFIG_SYS_FSL_ERRATUM_A004849
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
 
 
 #elif defined(CONFIG_ARCH_P3041)
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1
 
@@ -234,24 +168,10 @@
 
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 
-#define CONFIG_SYS_FSL_ERRATUM_USB14
 
-#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2	0x11
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
-#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
-#define CONFIG_SYS_FSL_ERRATUM_A004849
 
-#define CONFIG_SYS_FSL_ERRATUM_A005812
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
 
 
 #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
 
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1
 
@@ -268,34 +188,12 @@
 
 #define CONFIG_SYS_FM_MURAM_SIZE	0x28000
 
 #define CONFIG_SYS_FSL_TBCLK_DIV	16
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,p4080-pcie"
 
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
 
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-#define CONFIG_SYS_P4080_ERRATUM_CPU22
 
-#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 
-#define CONFIG_SYS_P4080_ERRATUM_SERDES8
 
-#define CONFIG_SYS_P4080_ERRATUM_SERDES9
 
-#define CONFIG_SYS_P4080_ERRATUM_SERDES_A001
 
-#define CONFIG_SYS_P4080_ERRATUM_SERDES_A005
 
-#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
 #define CONFIG_SYS_FSL_RMU
 
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x20
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
-#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
-#define CONFIG_SYS_FSL_ERRATUM_A004849
 
-#define CONFIG_SYS_FSL_ERRATUM_A004580
 
-#define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_A005812
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_ERRATUM_A007075
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
 
 
 #elif defined(CONFIG_ARCH_P5020) /* also supports P5010 */
 
 #define CONFIG_SYS_PPC64		/* 64-bit core */
 
@@ -314,19 +212,10 @@
 
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_USB14
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2
 
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9
 
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
 
-#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
 
 
 #elif defined(CONFIG_ARCH_P5040)
 
 #define CONFIG_SYS_PPC64
 
@@ -347,15 +236,7 @@
 
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_USB14
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
-#define CONFIG_SYS_FSL_ERRATUM_A004699
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510
 
-#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
-#define CONFIG_SYS_FSL_ERRATUM_A005812
 
 
 #elif defined(CONFIG_ARCH_BSC9131)
 
 #define CONFIG_FSL_SDHC_V2_3
 
@@ -367,8 +248,6 @@
 
 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT	0xff600000
 
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	3
 
 #define CONFIG_NAND_FSL_IFC
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 
 #elif defined(CONFIG_ARCH_BSC9132)
 
@@ -385,11 +264,6 @@
 
 #define CONFIG_NAND_FSL_IFC
 
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#define CONFIG_SYS_FSL_ERRATUM_A005434
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
-#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-#define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 
 #elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
 
@@ -406,7 +280,6 @@
 
 #define CONFIG_SYS_NUM_FM2_DTSEC	8
 
 #define CONFIG_SYS_NUM_FM2_10GEC	2
 
 #define CONFIG_NUM_DDR_CONTROLLERS	3
 
-#define CONFIG_SYS_FSL_ERRATUM_A006261
 
 #else
 
 #define CONFIG_SYS_NUM_FM1_DTSEC	6
 
 #define CONFIG_SYS_NUM_FM1_10GEC	1
 
@@ -439,13 +312,6 @@
 
 #define CONFIG_SYS_FSL_SRIO_LIODN
 
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_A004468
 
-#define CONFIG_SYS_FSL_ERRATUM_A005871
 
-#define CONFIG_SYS_FSL_ERRATUM_A006379
 
-#define CONFIG_SYS_FSL_ERRATUM_A007186
 
-#define CONFIG_SYS_FSL_ERRATUM_A006593
 
-#define CONFIG_SYS_FSL_ERRATUM_A007798
 
-#define CONFIG_SYS_FSL_ERRATUM_A009942
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
 
@@ -476,16 +342,6 @@
 
 #define CONFIG_SYS_FSL_TBCLK_DIV	16
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.4"
 
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
-#define CONFIG_SYS_FSL_ERRATUM_A005871
 
-#define CONFIG_SYS_FSL_ERRATUM_A006379
 
-#define CONFIG_SYS_FSL_ERRATUM_A007186
 
-#define CONFIG_SYS_FSL_ERRATUM_A006593
 
-#define CONFIG_SYS_FSL_ERRATUM_A007075
 
-#define CONFIG_SYS_FSL_ERRATUM_A006475
 
-#define CONFIG_SYS_FSL_ERRATUM_A006384
 
-#define CONFIG_SYS_FSL_ERRATUM_A007212
 
-#define CONFIG_SYS_FSL_ERRATUM_A004477
 
-#define CONFIG_SYS_FSL_ERRATUM_A009942
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 
 #ifdef CONFIG_ARCH_B4860
 
@@ -529,7 +385,6 @@
 
 #define CONFIG_SYS_PME_CLK		CONFIG_PME_PLAT_CLK_DIV
 
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_5_0
 
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
 
-#define CONFIG_SYS_FSL_ERRATUM_A008044
 
 #define CONFIG_SYS_FMAN_V3
 
 #define CONFIG_FM_PLAT_CLK_DIV	1
 
 #define CONFIG_SYS_FM1_CLK		CONFIG_FM_PLAT_CLK_DIV
 
@@ -547,9 +402,6 @@
 
 #define MAX_QE_RISC			1
 
 #define QE_NUM_OF_SNUM			28
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
-#define CONFIG_SYS_FSL_ERRATUM_A008378
 
-#define CONFIG_SYS_FSL_ERRATUM_A009663
 
-#define CONFIG_SYS_FSL_ERRATUM_A009942
 
 
 #elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
 
 #define CONFIG_E5500
 
@@ -584,9 +436,6 @@
 
 #define MAX_QE_RISC			1
 
 #define QE_NUM_OF_SNUM			28
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
-#define CONFIG_SYS_FSL_ERRATUM_A008378
 
-#define CONFIG_SYS_FSL_ERRATUM_A009663
 
-#define CONFIG_SYS_FSL_ERRATUM_A009942
 
 
 #elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 
 #define CONFIG_E6500
 
@@ -628,13 +477,8 @@
 
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v3.0"
 
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
-#define CONFIG_SYS_FSL_ERRATUM_A007212
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 #define CONFIG_SYS_FSL_ISBC_VER		2
 
-#define CONFIG_SYS_FSL_ERRATUM_A006593
 
-#define CONFIG_SYS_FSL_ERRATUM_A007186
 
-#define CONFIG_SYS_FSL_ERRATUM_A006379
 
-#define CONFIG_SYS_FSL_ERRATUM_A009942
 
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 
@@ -645,7 +489,6 @@
 
 #define CONFIG_NUM_DDR_CONTROLLERS	1
 
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_6
 
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
 
-#define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	3
 
 #define CONFIG_SYS_FSL_SEC_IDX_OFFSET	0x20000

+ 15 - 0
drivers/ddr/fsl/Kconfig
查看文件 

@@ -141,3 +141,18 @@ config SYS_FSL_ERRATUM_A009942
 
 
 config SYS_FSL_ERRATUM_A010165
 
 	bool
 
+
 
+config SYS_FSL_ERRATUM_NMG_DDR120
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_DDR_115
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_DDR111_DDR134
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_DDR_A003
 
+	bool
 
+
 
+config SYS_FSL_ERRATUM_DDR_A003474
 
+	bool

+ 0 - 1
include/configs/BSC9132QDS.h
查看文件 

@@ -20,7 +20,6 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x11000000
 
 #define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 
 #endif
 
-#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769	1
 
 #ifdef CONFIG_SPIFLASH
 
 #define CONFIG_RAMBOOT_SPIFLASH
 
 #define CONFIG_SYS_RAMBOOT

+ 0 - 52
scripts/config_whitelist.txt
查看文件 

@@ -1295,7 +1295,6 @@ CONFIG_FSL_QIXIS
 
 CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
 
 CONFIG_FSL_QIXIS_V2
 
 CONFIG_FSL_SATA
 
-CONFIG_FSL_SATA_ERRATUM_A001
 
 CONFIG_FSL_SATA_V2
 
 CONFIG_FSL_SDHC_V2_3
 
 CONFIG_FSL_SDRAM_TYPE
 
@@ -5353,31 +5352,7 @@ CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
 
 CONFIG_SYS_FSL_DSP_DDR_ADDR
 
 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
 
 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
 
-CONFIG_SYS_FSL_ERRATUM_A004468
 
-CONFIG_SYS_FSL_ERRATUM_A004477
 
-CONFIG_SYS_FSL_ERRATUM_A004508
 
-CONFIG_SYS_FSL_ERRATUM_A004510
 
-CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
 
-CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
 
-CONFIG_SYS_FSL_ERRATUM_A004580
 
-CONFIG_SYS_FSL_ERRATUM_A004699
 
-CONFIG_SYS_FSL_ERRATUM_A004849
 
-CONFIG_SYS_FSL_ERRATUM_A005125
 
-CONFIG_SYS_FSL_ERRATUM_A005434
 
-CONFIG_SYS_FSL_ERRATUM_A005812
 
-CONFIG_SYS_FSL_ERRATUM_A005871
 
-CONFIG_SYS_FSL_ERRATUM_A006261
 
-CONFIG_SYS_FSL_ERRATUM_A006379
 
-CONFIG_SYS_FSL_ERRATUM_A006384
 
-CONFIG_SYS_FSL_ERRATUM_A006475
 
-CONFIG_SYS_FSL_ERRATUM_A006593
 
-CONFIG_SYS_FSL_ERRATUM_A007075
 
-CONFIG_SYS_FSL_ERRATUM_A007186
 
-CONFIG_SYS_FSL_ERRATUM_A007212
 
-CONFIG_SYS_FSL_ERRATUM_A007798
 
-CONFIG_SYS_FSL_ERRATUM_A008044
 
 CONFIG_SYS_FSL_ERRATUM_A008336
 
-CONFIG_SYS_FSL_ERRATUM_A008378
 
 CONFIG_SYS_FSL_ERRATUM_A008407
 
 CONFIG_SYS_FSL_ERRATUM_A008511
 
 CONFIG_SYS_FSL_ERRATUM_A008514
 
@@ -5386,32 +5361,11 @@ CONFIG_SYS_FSL_ERRATUM_A008751
 
 CONFIG_SYS_FSL_ERRATUM_A008850
 
 CONFIG_SYS_FSL_ERRATUM_A009635
 
 CONFIG_SYS_FSL_ERRATUM_A009660
 
-CONFIG_SYS_FSL_ERRATUM_A009663
 
 CONFIG_SYS_FSL_ERRATUM_A009801
 
 CONFIG_SYS_FSL_ERRATUM_A009803
 
 CONFIG_SYS_FSL_ERRATUM_A009929
 
-CONFIG_SYS_FSL_ERRATUM_A009942
 
 CONFIG_SYS_FSL_ERRATUM_A010165
 
 CONFIG_SYS_FSL_ERRATUM_A_004934
 
-CONFIG_SYS_FSL_ERRATUM_CPC_A002
 
-CONFIG_SYS_FSL_ERRATUM_CPC_A003
 
-CONFIG_SYS_FSL_ERRATUM_CPU_A003999
 
-CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
 
-CONFIG_SYS_FSL_ERRATUM_DDR_115
 
-CONFIG_SYS_FSL_ERRATUM_DDR_A003
 
-CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 
-CONFIG_SYS_FSL_ERRATUM_ELBC_A001
 
-CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 
-CONFIG_SYS_FSL_ERRATUM_IFC_A002769
 
-CONFIG_SYS_FSL_ERRATUM_IFC_A003399
 
-CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 
-CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
 
-CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 
-CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
 
-CONFIG_SYS_FSL_ERRATUM_P1010_A003549
 
-CONFIG_SYS_FSL_ERRATUM_SEC_A003571
 
-CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
-CONFIG_SYS_FSL_ERRATUM_USB14
 
 CONFIG_SYS_FSL_ESDHC_ADDR
 
 CONFIG_SYS_FSL_ESDHC_BE
 
 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 
@@ -6751,12 +6705,6 @@ CONFIG_SYS_OSD_DH
 
 CONFIG_SYS_OSD_SCREENS
 
 CONFIG_SYS_OSPR_OFFSET
 
 CONFIG_SYS_OS_BASE
 
-CONFIG_SYS_P4080_ERRATUM_CPU22
 
-CONFIG_SYS_P4080_ERRATUM_PCIE_A003
 
-CONFIG_SYS_P4080_ERRATUM_SERDES8
 
-CONFIG_SYS_P4080_ERRATUM_SERDES9
 
-CONFIG_SYS_P4080_ERRATUM_SERDES_A001
 
-CONFIG_SYS_P4080_ERRATUM_SERDES_A005
 
 CONFIG_SYS_PACNT
 
 CONFIG_SYS_PADAT
 
 CONFIG_SYS_PADDR